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Re: [f-cpu] Winograd DCT on my seul.org account


Andreas Romeyke wrote:
> Hello,
> > code once, and i sworn i'll never do that again. We need something that
> > eases asm programming, beyond macros and other low-level constructs :
> > something that treats code blocks as a complex object with its dependencies,
> > register allocations, parameters... and that the programmer can handle
> > as easily as drag-n-drop. when dropped, the register allocation is
> > done automatically, according to the programmer's settings.
> Remember, forth can do this... and surplus you can test forth-code
> interactively...

Forth is an incredible language but it can't do all i want,
or i would use it for a loooong time. It also introduces a lot of things that
can interfere with the algorithms, or at least make you forget about
what you want to do. Finally, the largest scope that i could globally
optimize by hand is 100 or 120 instructions per block. we need to go beyond
that. Forth is the contrary of a dataflow graph analysis tool because
it over-serialises the computations.

> Bye Art1

Juergen Goeritz wrote:
> Hi,
> forgot two things in my list of appreciated qualities
> of that ultimative language:
> - easy readability, easy learning, easy debugging.
> - easy simulation of unimplemented parts (e.g. like
>   the test stimulation possibilities in VHDL)
> - integrated abstract layer documentation scheme
>   that could be extended to automatic code generation.
> Very large scale projects usually lack of early test
> possibilities. The best way of implementation always
> lets you have something to show to the customer, even
> in very early stages already.

at least, with a good VHDL background, you're used to write
a lot of testbenches. that's one good reason to reuse of
lot of its concepts.

I think about this program :
 - 1) make a dumb but flexible backend for, but not tied to, gcc
 - 2) enhance the backend
 - 3) create a VHLD-like frontend (without the hassles).
 - 4) create some basic libraries.

> JG
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