Re: [f-cpu] IDU News; synthesis report

[devik <devik@cdi.cz>]

> > Ok, ASU on 2E: 104.745MHz
>
> Looks good.

yes :) And 117 MHz on Virtex2.

> > By the way, I synthetized scalar 64 bit adder and 32bit multiplier
> > for compare.
> > Adder (not pipelined): 120 MHz, 155 slices
> > Adder (2 stages):      160 MHz, 198 slices
>
> That's a plain adder, right?  No subtract, saturate or average
> functions?

exactly. It is ripple carry adder. I did pipelined one by
splitting it into 2 32 bit parts.
XST detects "+" operators and uses internal fast-carry
chain. It needs only 50 ps (picoseconds) per carry.

Pipelined one runs at 164 MHz and 113 slices in Virtex2.

> > Mult (not pipelined):  50 MHz,  344 slices
>
> What kind of multiplier?

Don't know. I simply used "*" and XST synthetized one using
its dedicated resources (fast carry and "AND-chain").
I also tested it with Virtex2. It used 3 on-chip 18x18
multipliers and goes 90MHz (single cycle 32 bit MUL).

devik

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