Re: [f-cpu] Re: Floating-Point?

[Ben Franchuk <bfranchuk@jetnet.ab.ca>]

Yann Guidon wrote:

> For those who where not yet here when the question was raised first :
> there is already a patent (MIPS) on a configuration register
> that defines endianness. So we thought : fuck, let's simply move
> the bit to the instruction. In fact, it's exactly the same amount
> of HW (a "swap" unit that works both ways) but it is not configured
> at boot time. that's all. I think that VAX byte ordering was never
> considered. For this and the rest, there must be all the necessary
> instructions provided by the SHL (bit shuffling) unit.

Ok what about instruction decoding of the opcode in a configuration
register with each setup modifying the fields used?
version 1 - endian bit active high
version 2 - endian bit active low
( Special register xor endian flag ).
Ben.

-- 
Standard Disclaimer : 97% speculation 2% bad grammar 1% facts.
"Pre-historic Cpu's" http://www.jetnet.ab.ca/users/bfranchuk
Now with schematics.
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