"reinventing RISC" (was Re: [f-cpu] Re: Floating-Point?)

[Yann Guidon <whygee@f-cpu.org>]

hi again,

nicO wrote:
> Ben Franchuk a écrit :
> > Juergen Goeritz wrote:
<snip>
> > PS.What would be nice is to have non standard sizes for special
> > functions. While not used any more 3 - 5 bit fields come to mind
> > for packing 15 bit colors for a video display.
today, 24-bit display is a commodity, so why bother ? ;-)

> Maybe a shift&mask (SIMD) instruction could be enough. You just add an
> instruction but just for the convertion.
it IS enough.


then Ben Franchuk wrote:
> nicO wrote:
> >  Maybe a shift&mask (SIMD) instruction could be enough. You just add an
> > instruction but just for the convertion.
> The PDP-10 had a very nice bit packing/unpacking instructions but that
> is CISC rather RISC stuff. Ben.

Some other non-CISC have nice bitfield extraction/insertion capabilities.
unfortunately there are 2 problems :
 - make the function fit into a F-CPU instruction format
 - keep the instruction scalable.
What looks good for a computer will not be useful when the register
size increases, for example.

There are some proposed (optional) instructions for this kind of operations
in the F-CPU opcode map, but the necessary unit must be designed.
notice that the recently added MUX instruction helps a bit.



Juergen Goeritz wrote:
> On Wed, 15 Aug 2001, Ben Franchuk wrote:
> > Ok what about instruction decoding of the opcode in a configuration
> > register with each setup modifying the fields used?
> > version 1 - endian bit active high
> > version 2 - endian bit active low
> > ( Special register xor endian flag ).
> > Ben.
> 
> What's the hack here if it's just one bit? Why does
> it add up to and complicate the decode stage? Since
> after decode the intermediate signals have to be
> registered anyway for later execution I don't really
> see the point. Could someone please point me to it?
> 
> The other suggestion about using a toggle filpflop
> may be interesting either - but I am a bit worried
> about the poor compiler designers...

i was thinking about that, too. why make it more complex
than it already is ?


WHYGEE
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