Re: [f-cpu] Re: Floating-Point?

[nicO <nicolas.boulay@ifrance.com>]

Hans Summers a écrit :
> 
> > On Thu, Aug 16, 2001 at 01:49:27PM +0800, Glenn Alexander wrote:
> > > Hi. This is my first post to this list. My background is as
> > > a hardware technician, not a chip designer so bear with me.
> > >
> > > On Thursday 16 August 2001 03:41, you wrote:
> > > > Michael Riepe a écrit :
> > > >
> > > > In sparc, there is no 80 bits float but 128 bits (2
> > > > registers used in the same time). We don't need 1 cycle
> > > > multiplication so it could be done for the fcpu.
> > >
> > > I am thinking that taking the two-register approach might be
> > > over-complicating matters. Since F-CPU is intended to later
> > > be scaled above 64 bits, if someone wanted 128-bit floats
> > > in the future they would impliment a 128-bit F-CPU.
> > > Especially for the FC-0 and probably for the FC-1, KISS
> > > (Keep It Simple for us Stupid people).
> >
> > 128-bit `quadruple precision' (like SPARC) is IMHO the way to go, but
> > not in the FC0.  For now, let's stick to 32-bit and 64-bit
> > (with 80-bit `double extended' used inside the FP unit,
> > to maintain IEEE compliance).
> >
> Could someone explain to me why 128-bit FP is desireable? I am struggling

It's very easy : almost all scientific calculation ! This include
electric simulation (spice), aerodynamic, and so on... For a lot of
mathematician 32 bits are a none sense ! For laughing, they said that
they didn't want to take a plane any more ! Don't forget that every
compiler defined float as double (64b) by default. With 32 bit there is
too much rounding problem. The only killing application for it is the
image processing. That's wy some of them want 256 bits fp number.

nicO

> here to think of an application which needs 30 decimal places of precision
> (or whatever it is). In fact I'd go as far as to suggest that in most cases
> 32-bit FP would be sufficient. Chip designers tend to dream of having a
> 128-bit or 256-bit processor etc., but without reference to the real world
> which doesn't need (actually can't make good use of) such high precision FP.
> Expanding the word size won't deliver a performance enhancement. My belief
> is the only way such large word sizes make any kind of sense is in the
> contect of SIMD, where the large word size is effectively a parrelisation.
> 
> ------------------
> Hans Summers
> http://www.hanssummers.com/computers/fcpu/scheduler.htm
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