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Re: (m) Re: [f-cpu] More Instruction Set Trouble



hi,

nicO wrote:
> Yann Guidon a écrit :
<>
> > If you add a new opcode which says that we don't use PC but r3
> > (it's fairly straight-forward),  we're done. no curious scheduling,
> > nothing to change, the necessary HW doesn't change and we must simply
> > update the manual and the instruction encoders/decoders.
> 
> Seems ok to me. But why don't we map the PC inside the register map ?
wow, i should sleep and i'm dreaming awake, or i am reading something
strange here ?

I see no reason to map the PC in the register set. I see no use,
and if you want it, just use loopentry or loadaddr.

There is one case, however, where mapping the PC in the visible
registers is more or less necessary, it is with my prefetch-queue-based
architecture, which has to juggle with several simultaneous instruction
fetches, but it is very, very far fetched.

> nicO
WHYGEE
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