Re: [f-cpu] the wrong way (or not?)

[Juergen Goeritz <goeritz@oekomm.de>]

Hi,

my opinion is that the core parts of f-cpu should
be verified. The parts outside the core like memory
controller, interrupt unit a.s.o. could be 'delayed'.
The best way to get started is to use some FPGA to
test the concept in hardware.

But to remind everybody of Intel x86 success. One
part was that it came with the x87 floating coproc
that speeded up arithmetics quite a bit. Motorola
had no real floating point unit fitting to 68K. It
may be a bit carried to far to claim that this was
the only point for Intel success but it is at least
one of them.

If you don't go for floating point right from the
start you will have targeted the f-cpu to embedded
applications. I don't know if that can be 'healed'
later but it's much easier to strip a unit to make
some shrinked version than to extend something.

The direct competition right now is the LEON Sparc
which comes with the nearly free Meiko FPU for low
quantities (SUN SDLC license required). I don't see
the Alpha architecture as THE direct competition at
all - sorry WHYGEE.

LEON is only 32 bit though but a lot of software for
it is already available as open source. And it could
be used as a powerfull IO processor...

Why not implement f-cpu as a coprocessor into the
LEON IO processor. With the LEON coprocessor opcodes
it could be easy to implement a debug interface for
f-cpu testing with download and single stepping...

Does anybody have access to a synthesis tool for some
prototyping? Does anybody have access to a FPGA board
for testing?

JG


On Mon, 27 Aug 2001, Andreas Romeyke wrote:
> Hash: SHA1
> 
> Hello,
> 
> I am back from my vacation and I was slayed from your discussions... :)
> 
> I think we should forget to trace the way to include floating point now.
> Why?
> IMHO there are too many tasks to do, which are more important than
> thinking about floating point units. First, we should have a working
> "simple" F-CPU, not more nor less.
> Second, a FPU was declared as an optionally unit,
> Floating-point-operations are rare and should be emulated in an
> intelligent way (software) to use the full power of F-CPU's
> SIMD-capabilities
> Last, If we are better in designing units and we have a real (!) F-CPU we
> can easily extend the core with an existing FPU, I think.
> 
> In my mind I do not realisize how you will design the scoreboard and the
> shifting unit in a possible way or I misunderstood anything.
> 
> In my opinion we need in near future a working CPU to get and hold a good
> developer-basis, and to make tests in reality not in emulations only.
> 
> Because we can compose a set of FPGAs (Altera and Co.) to load and emulate
> the CPU, we should go in this direction, to make FC0 to that what it is,
> "a proof of concept".
> 
> I am in right?
> 
> Bye Andreas

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