Food for thought,
As some of you know of my
effort; I have added Instructions to the basic
DDP-516 repetoire. The following are to
support data handling (packing/unpacking) requirements for a 64 Bit design:
Clear Bit
Set Bit
Test Bit &
Branch
Load selected Byte in the
selected Byte Position
Store selected Byte in the
selected Byte Position
Clear selected Byte in
Accumulator (A-Reg)
Haven't forgot you Ben - I
wanted good news of implementation before sending you
a data package. The Load & Store logic is the
most complicated compared to other
functions & requires a lot of FPGA cells.
The performance exceeds my self inflicted
requirements.
Dick Hartney
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