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Re: Rep:Re: [f-cpu] Conditionnal load and store, the return





Nicolas Boulay wrote:
<cut>

>>>> Why speaking one
>>>>more time about FPGA ? We design IP, so we could then choose when things
>>>>will be implemented. 250 Mhz for FPGA is very very optimistic !
>>>>On our system it must have only memory+f-cpus+io controler, that's all.
>>>>One more chip will increase the price for almost nothing.
>>>>
Joke :-P

Do you know than Actel proposed a FPGA wich reach 500MHz ?

See Ya,
Just an Illusion

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