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Re: [f-cpu] F-CPU architecture...


Rares Marian wrote:

Just a bizarre thought:
What if instead of moving data, the registers reassigned their own addresses so that data would appear to have moved?

you mean : "register renaming" ?
in FC0, this would almost kill the remaining performance ...
This would add one or two stages at the beginning of the pipeline,
thus doubling the penalty of a branch.
So we'll have to include branch prediction etc....
and i don't count other things like all the register renaming mechanisms
which would consume even more silicon.
Now, balance that with the performance gain
which i estimate is near zero for FC0.


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