[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [f-cpu] 3r2w -> 2r1w

To: f-cpu@seul.org
Subject: Re: [f-cpu] 3r2w -> 2r1w
From: Michael Riepe <michael@stud.uni-hannover.de>
Date: Sun, 23 Dec 2001 00:56:18 +0100
Delivered-To: archiver@seul.org
Delivered-To: f-cpu-outgoing@seul.org
Delivered-To: f-cpu@seul.org
Delivery-Date: Sat, 22 Dec 2001 18:56:22 -0500
In-Reply-To: <3C253D09.67D2F7FB@ifrance.com>; from nicO on Sat, Dec 22, 2001 at 09:10:17PM -0500
References: <3C253D09.67D2F7FB@ifrance.com>
Reply-To: f-cpu@seul.org
Sender: owner-f-cpu@seul.org

On Sat, Dec 22, 2001 at 09:10:17PM -0500, nicO wrote:
> We have soon speak about that. I beleive that Whygee was ok about it.
> But a recent post seems to say the opposite.
> 
> So i propose to change all reference in the manual concerning register
> access as rn and rn+1 by rn with n even and rn+1. So why ? 

Didn't we move to (rn; rn^1) already?  That will effectively make the
register bank a set of register pairs.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/

References:
- [f-cpu] 3r2w -> 2r1w
  - From: nicO <nicolas.boulay@ifrance.com>

Prev by Date: Re: [f-cpu] Manual update
Next by Date: Re: [f-cpu] 3r2w -> 2r1w
Prev by thread: [f-cpu] 3r2w -> 2r1w
Next by thread: Re: [f-cpu] 3r2w -> 2r1w
Index(es):
- Date
- Thread