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Re: document about cpu design issue(was: [f-cpu] Where are the LSUand fetcher descriptions??)



hi,

nico@seul.org wrote:

Hi.

Still in the investigation process, I read some of the vhdl code found in
snapshot_jws_30_07_2002.tar.bz2 and snapshot_yg_29_07_2002.tbz.
I see no description for LSU and a very simple description for fetcher.
What is the status of these unit?
Where can I found some doc to start?

full of information on the subject :
http://www.cs.berkeley.edu/~culler/cs252-s02/#schedule

specifically about memories :
http://www.cs.berkeley.edu/~culler/cs252-s02/slides/Lec04-caches.pdf

nice pointers but i thinl that Pierre wanted something more related to how
FC0 and F-CPU implement memory access.

I have explained how the LSU and fetcher work during the conference at ISIMA,
IIRC, so this background should be a good starting point.

If the job is to only simulate the instruction set, it is not necessary to implement the
whole LSU/Fetcher stuff and a simpler buffer and a dumb memory interface
can do the trick.

nicO

YG

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