Re: Rep:Re: Re: [f-cpu] No latches, please !

[nicO <nicolas.boulay@ifrance.com>]

Yann Guidon a écrit :
> 
> hi,
> 
> nicO wrote:
> >
> > Some example :
> > http://www.cse.psu.edu/~cg577/hw1s98.html
> 
> i have looked and i was surprised by the first drawing
> (first attachment) : there is no feedback loop that memorizes
> the data :-/ is it precharged logic ? :-(
> 

Of course not !

You just discover the difference between a flipflop and rs bascule.

nicO

> The last one (IBM Power) looks more classical
> but i am surprised by the input buffer(s) at
> the source/drain and not the gate of the transistors.
> 
> And in the last attachment, i have drawn a transparent
> latch with two inputs with the nice side effect that
> there is no oscillation if both write signals
> are set at the same time :-D
> 
> WHYGEE
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