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[f-cpu] ERIN32 Interrupt Handling

For what it's worth....
I have provision for 8 Vectored Priority Interrupts; with individual Mask; and a common Enable/Disable.  An interrupt functions exactly the same as an JST (Jump & Store Return) Instruction.  The interrupt does its necessary processing, and waits for an Instruction Fetch before making the Break.  I use 8 pairs of dedicated addresses (hard wired).  I have used this implementation in other designs and have never had the software people complain.  After all, what I do is hope to make things easier for the Software guys -
never jam things down their throat without proper consultation.
Dick Hartney