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Re: [f-cpu] GCC and jmpz vs. jmpl



> > thing to discuss.
> > When we do compares < > >= <= we got results as 1 or -1.
>
> No, we get -1 for true and 0 for false, both truncated to the chunk size
> (unless we change the ISA, but I see no reason to do so).

ehh sorry my mistake - I was -1/0 in my mind .. and
it is how I set it in gcc

> Since `neg' is rather slow (two cycles), it's probably better to use
> `andi $1, r3, r1' to isolate the LSB.

but is we need to convert 0->0 and -1->1 neg seemed
to do the job. From manual it seems that incrementer
does its job with 1 cycle latency which holds
for inc/dec/neg/cmp.....
Who added next cycle ??

> One solution would be a `chunk-size' logical operation that zero-extends
> the result. If we really had `xor.b', you could just write
>
> 	// beq r1, r2, r4
> 	xor.b r1, r2, r3
> 	jmpz r3, r4
>
> 	// bne r1, r2, r4
> 	xor.b r1, r2, r3
> 	jmpnz r3, r4
>
> because the high part of r3 would be guaranteed to be zero.

yes I use it - there is no problem with xor/jmp pair other than
I want to use jmpl for speed.
The main (hypothetical question) was how complex is to add
cmpe into incrementer - probably there would have to be XOR
before it and it is too much gates, am I right ?

devik

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