Re: [f-cpu] Instruction census

[Michael Riepe <michael@stud.uni-hannover.de>]

On Mon, Jan 13, 2003 at 12:25:25PM +0100, devik wrote:
> > I compiled a set of C files (among them libelf and fctools) with fcpu-gcc
> > and started to count instructions.  The most often used single instruction
> > was an ordinary unconditional `move':
> 
> was was not it one with comment "zero_extend" ? Most of them will
> be gone but we will have to duplicate almost ALL patterns
> with implicit zero extend (as fcpu zeroextends automatically
> as x86-64 from AMD does).

There were 21178 unconditional moves (total), 9729 of them were zero
extension operations - 45.9%

[...]
> > The vast majority of instructions are load/store, add/sub/loadaddr[i],
> 
> yep ... gcc can't prefetch and "cache" data in registers too
> early because of read-write ordering rules which can't be
> resolved by aliasing analysis. It is why IA-64 has ld.a
> instruction. There if flag which tells gcc to use "possibly
> dangerous" early fetches - but it doesn't follow C standard then.

It does.  If the prefetched memory location has been modified when the
real load follows, an exception is thrown and the exception handler is
supposed to re-fetch the data.

[...]
> > This is mostly the profile I expected from standard software.  Note that
> > I compiled with `-O -fomit-frame-pointer'; otherwise, the result would
> 
> WARNING: -fomit-frame-pointer produces sometimes addi with
> inwalid (out of range) imm. I'm not still sure why.

fcpu-as didn't complain so far (only for the loadcons[x] case).  Which
value did it produce?

> > Another interesting fact is that 1/4 of the multiplications are actually
> > `mac' operations (most of them of the kind where all operands have the
> > same size).  One can also observe that add, sub, xor and shift[lr] are
> 
> well, mac is not yet supported - we have generaly problems
> with ^1 register addressing.

`mac' doesn't use a second output - it's 3r1w, not 2r2w.
And it is supported by gcc now, in all variants :)

> > 	- reduce number of load/store instructions
> > 	- increase number of conditional moves (in favor of jmp{cc})
> 
> how ? it would probably help to manualy find places
> where movcc could be used and is not

I'll check my test files.

[...]
> > 	- make use of SIMD instructions
> 
> in string ops .. well. for other, we can enable gcc to
> use vector modes explicitly but it works oonly with
> programs whose knows how to use them. gcc will not
> emit them itself.

Also done :)

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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