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Re: [f-cpu] x86-64 long article



On Fri, 24 Jan 2003, Yann Guidon wrote:

> >The lvds link run ar 600 Mhz/pin. 1Ghz will be soon reach. 10 Ghz is plan.
> >
> Like F-CPU.
> But F-CPU should be able to run on 'old' technologies.
> Do you believe that 10Ghz links will be possible using .35u ?

At least 3.125GHz links are available for 0.18u process from many vendors. 
If I remember correctly at 0.35u maximal link speed was ~1GHz. But these 
cores are always fullcustom blocks, usually available from the vendor.

> > We can use this for connecting F-cpu like Athlon 64 does (no big and fat routing chip that cost a lot and add latency like a northbridge in PC chipset).
> >  
> >
> hmmm LVDS needs 2 pins, so it's the same bandwidth as 2 pins at 300MHz.

I'd like to see how you handle all the problems related to 300MHz single 
ended pin. Even >150MHz signaling needs quite careful design if it is 
single ended (careful layout, PCB design, some PLL tricks etc.)
On the other hand 600MHz LVDS link is normal old technology and 
is easy to route at PCB level. And by using for example PCML signaling 
higer speeds are possible. For example 50cm with FR4 PCB and 3.125G PCML 
link is easily possible. Even at 0.18u you can put ~50-60 of these links 
to a single die with standard CMOS process. Of course high speed links 
need BGA packaging to handle impedance and other problems.

> Plus, if you use serial encoding, there is more latency for a single packet.

On the other hand serial links are much easier to handle at board level. 
Wide fast busses are a nightmare for PCB designer.

> >But technology like hypertransport could be cheaper because you could reuse a lot of test material and module done for it. "Standard" is always cheaper.
> >  
> >
> oh yes, AMD will allow us to use their test equipments ....

You can get HT stuff from many vendors (measurement equipment, cores etc.)

> AMD and Intel are slowly switching to .13u,
> this is not possible to use it unless you make millions of chips.

Some fabs are selling 0.11u silicon already. The biggest cost are the 
masks, you can make a buisiness case also for low volume chips, but the 
chip has to be expensive.

> >>>>>Too bad that 8b/10b encoding and other good stuff are patented.

As far as I know 8b/10b is not patented. There are some patents that cover 
few ways to implement the coding. On the other hand if speed is everything 
there are other ways to do byte and frame alignment even without bandwidth 
loss.

> One prolem i have found with current technology is the
> "negociation" of the frequency between two different devices.
> Source clocking is one of the answers but it's not enough.

Source clocking is quite easy way to do it at high speeds, especially if 
the sources have all own crystals and speed compensations between links 
has to be done.

-- 
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Mr. Kim Enkovaara   | kim.enkovaara@iki.fi | Microelectronic Riemannian
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