Re: [f-cpu] Remarks to most recent (2002/07/04) snapshot

[Etienne LABARRE <etienne.labarre@gadz.org>]

On Fri, Jul 05, 2002 at 03:00:25PM +0200, Michael Riepe wrote:
> EU_IDU (not ready yet):
> 
> 	The 8-bit subtractor can be replaced with misc.Generic_Adder.CIAdd.
> 
> EU_INC:
> 
> 	The `bloc_and' entity and the tree of AND gates can probably
> 	be replaced with my misc.Bit_Manipulation.cascade_and function.
> 	Only the SIMD stuff needs to be added.

Yes, i will try to include your generic function in my code.

> 
> 	Since only INC/DEC/LSB is supported, will there be a complementary
> 	unit for CMP/MSB?

For the moment, the INC unit perform INC/DEC/NEG operation with only one
cycle. I will add others operations support (CMP/MAX/MIN), but i don't
know if it's possible with one cycle, because the size of end-MUX.

Etienne
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