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[f-cpu] before i go to Bordeaux...



hi,

just to let you know that i am uploading yet another
snapshot. It's more or less functionning and it's aimed
at the "active" people (those who write code too).
There are still some small bugs in the "core" VHDL
stuff and i just started yet another C thing...

I met Etienne today and we agreed on one thing :
we are currently rewriting our units (he maintains
INC and i maintain ROP2) to comply with Michael's
recommendations. However we don't want to do that
all the time and synthesis will be another difficult
time. So we better do it now. Conclusion : it's now
time to seek FPGA partners which would at least
provide a synthesizer, so we can check whether our
code is correctly elaborated.

If you have friends in this branch, please tell
them about F-CPU ;-)

WHYGEE
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