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Re: [f-cpu] Coding for Synthesis



On Wed, Jul 10, 2002 at 11:34:01AM -0600, Ben Franchuk wrote:
> 
> >> - pipeline enable:
> >>
> >>    If your unit has more than two pipeline stages, you probably want
> >>    to chain the enable signal. That is, the enable signal `travels'
> >>    through the pipeline together with the data `wavefront' (I used
> >>    that trick in the IMU in order to save power). To do so, provide an
> >>    `enable out' signal in each stage:
> 
> But would not optimzation refactor the gates down to a single level?

Yes, they're supposed to be there. The goal is to turn off all unused
stages - not the whole pipeline at a time.

-- 
 Michael "Tired" Riepe <Michael.Riepe@stud.uni-hannover.de>
 "All I wanna do is have a little fun before I die"
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