Re: [f-cpu] Coding for Synthesis

[Kim Enkovaara <embo@mpoli.fi>]

> > >*Who* recommends this, BTW?
> > >
> > By example : Synopsis, Symplicity, Examplar...
> > This is not a mandatory condition but it can help synthesis  :-)
>
> If a synthesizer needs help with *that*, it's probably not worth the
> (huge amount of) money you pay for it ;)

At least Synopsys DC is not very good optimizer. And DC VHDL reader is one
of the worst ones, DC just has a big market share and good name, it is
not very modern product.

You can try how bad DC is by feeding it parallel CRC network made from xor
gates with just for loop and generate. DC can't optimize that network but
Synplify happily optimizes it. With DC the network has to be first
optimized by some other tools (usually designers own perl/C programs).

--Kim


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