Re: [f-cpu] TLB design

["Christophe Avoinne" <christophe.avoinne@laposte.net>]

----- Original Message -----
From: "Cedric BAIL" <cedric.bail@free.fr>
To: <f-cpu@seul.org>
Sent: Sunday, July 14, 2002 8:12 PM
Subject: Re: [f-cpu] TLB design


> > - virtual address (64-<n> bits)
> > - physical address (64-<n> bits)
> > - address space identifier (ASI; 8 bits was suggested)
> > - supervisor access rights (RWX, 3 bits)
> > - user access rights (RWX, 3 bits)
> > - valid bit (indicating that the entry is valid)
> > - present bit (indicating that the page is in memory)
> What did you mean whith this bit ?

Present bit is absolutely necessary for HW tlb, it is to say that entry is
not a valid mapping and help us to raise an exception to fix it.

We use it to implement virtual memory swapping from/to mass storage.

But I don't know if it is necessary for SW tlb, I thought SW tlb only
contained valid page entries (since if not in TLB, it always raises an
exception).

> > - dirty bit (indicating that the page has been written to)
> Same question.

This page was modified by someone so we could need to synchronise with
external storage, it is absolutely necessary for virtual memory and file
mapping.

> > - used bit (indicating that the page has been accessed)
> Why not a counter ? I currently don't see how the OS can make it's
decision
> about how to remove a TLB entry if TLB is full.

It is the only way to know if this page was accessed at least one time,
absolutely necessary for virtual memory. Counter is interesting but still a
luxe.


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