Re: [f-cpu] Conditionnal Load and Store

["Christophe Avoinne" <christophe.avoinne@laposte.net>]

----- Original Message -----
From: "Michael Riepe" <michael@stud.uni-hannover.de>
To: <f-cpu@seul.org>
Sent: Monday, July 29, 2002 12:30 AM
Subject: Re: [f-cpu] Conditionnal Load and Store



> `jump' has a free bit, and we can free one in `move' if we make sign
> extension a separate operation.
>
> Another option is to make `move' a full-word operation (that is, no
> size bits at all, like jump) and reconsider `widen' for sign and zero
> extension. That way, we can use 6 bits for the condition code.
>

If we consider that registers are always 64-bit wide (or 256-bit wide),
'move' does not need to have size-bits. I always thought that size-bits
usually apply for load and store operations not for registers by themselves.
Sign or zero extension should be done with 'widen', since its name is not
misnamed :).

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