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Re: [f-cpu] More broth in the Alphabet Soup

hi !

Ben Franchuk wrote:
> Michael Riepe wrote:
> > > Just a note about multiple pointers : a register can contain
> > > ONLY ONE pointer, otherwise how would we handle jumps and load/stores ?
> > Yep.
> >
> > > another note :
> > > a scatter/gather instruction would be ideally performed using a "base"
> > > pointer (checked the usual way) and a SIMD "offset", so every SIMD offset
> > > chunk is parallelly checked against the maximum allowed offset (size of page
> > > in TLB ?) and the TLB doens't need as many ports as there are chunks...
> >
> > Sounds good. Especially if we require the base pointer to be page
> > aligned :)
> >
> What about dumb things like video displays that have multiple byte sizes?
> Here your gather would need to be for bytes,words,and longs on a long boundry.
hmm i see, that's the offset size problem...
if you need to access more than 64K 16-bit words, then you can mask off
the LSB and perform more 32-bit accesses. The results are shifted/masked
to return the wanted part.

scatter/gather is not going to be implemented on FC0 but it's not too late
to speak about it... though by nature, it's going to trigger a lot of cache
misses and it's not adapted to FC0 at all...

> Also what about list languages that often use the upper bits of a
> address for garbage colection and pointer types?
then a simple ANDN instruction will mask off those bits before they
are used... no ?

> Ben Franchuk - Dawn * 12/24 bit cpu *
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