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Re: [f-cpu] Simulating with GHDL



hi !

devik wrote:

well, there could be other things ....
i'm currently working on http://f-cpu.seul.org/new/layout2.gif

btw, what tool do you use for the pcb layout ?

Eagle light/gratis edition.
It is limited to 2 sides and 8x10cm
but that's exactly the physical limits i have :-)

plus, Eagle has a huge component library
and it's very easy to add new components.

But it's going to change one day.
I spoke to Actel guyz and they will have a Linux version
of their dev environment (sim, place, route etc.) by 2004,
so i'll try to negociate a devkit and other resources.
Their latest silicons are real heavens for F-CPU cores,
but i fear that my RAM is really really too small for
synthesis&place&route ;-)

:-) what's Actel ? Custom silicon or fpga ?

FPGA.

devik

Nicolas Boulay wrote:

Le Dimanche 29 Juin 2003 08:25, devik a écrit :
:-) what's Actel ? Custom silicon or fpga ?
small antifuse fpga .

well, they still fab some, but the ProAsic+ and the next generations
are huge seas of simple gates, they can reach "2.5 million gates".
that could be enough to fit a full F-CPU and some I/O....
and the new family is will use .13u fabs.
Compared to Altera or Xilinx, there is a big good thing :
it's EEPROM cells, not SRAM or fuse !!!
This means that it can later be used to make a reconfigurable,
upgradable computer boards and powerup-time, contrarily to SRAM-based
FPGA (particularly for large ones) is immediate.


YG

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