[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[f-cpu] another DATE report



hello,

The DATE exhibition closed today in Paris.
There were a lot of good news, too.

Yesterday, i went there with Nicole. I also met
ex-co-workers from Mentor Graphics, some of them
are working in other companies.

We met a journalist from a parisian magazine in
arabic langage, a belgian small company who assists
other EDA users on Linux (mind.be), and we picked the
last noise-making tuxes from the HP booth :-) I also
chatted on other booths, for example at DOLPHIN INTEGRATION,
AXIS, ALDEC, Design and Reuse, or Virtual Silicon Technology.

I met again with Europractice (like every year).
They don't have a direct solution to the design
style + synthesis problem BUT John Morris has a
very interesting idea : including the F-CPU source
packages in their CDROMs (one issue every 6 months,
i guess) which are distributed to universities.
With some luck, several universities, using a wide
range of synthesisers and design kits from different
fundries, will attempt to synthesise the F-CPU
and maybe give some feedback. This is an additional
and very targetted distribution channel.

Ooops, it seems i said that yesterday already.

Today, i met Renaud (who should also subscribe
to the french mailing list ;-D) at his booth.
I told him to come to the "First Jeudi" meeting
that just ended, now (i'm back home and type this).

I also met someone i hadn't dreamt to see : Larry Rosenberg,
from the VSI Alliance (vsi.org). We talked mainly about
using the VCI standard interface for F-CPU and the discussions
were very positive, they confort us in thinking that the
deesign committee has done a very good work because
large european companies like Alcatel and ST are using it
(though they don't publicize on it).

Though the work on VCI is stopped and the committe is dissolved (?),
the standard is not frozen because a company had reopened
the debate. Larry told me there is a possibility of reaching
an agreement and even creating a "VCI User Group", where the
F-CPU can have a place. Larry confirmed that, apart from paying
for the copyrighted specification document, there is no tie
of any kind by using the VCI interface in any design. It can
be extended in different ways (data bus size, for example)
and it provides a direct connexion to existing industrial IP cores.
To "bypass" the copyright issue, it is possible to "rewrite"
the spec. Since all F-CPU documentations are available under
the GNU Free Documentation Licence, and because it will mainly
describe the implementation in F-CPU, there is no problem or risk.
I have access to some old version specs in the university, which
uses VCI too, and i can write a scratch course. I also want
to create a 4th level in the specification where the interface
protocol is completely symmetrical : both sides can be initiators
and targets, thus allowing a CPU to access the private memory
range of another CPU. This could be later versed back to the
"official" VCI standard.

Then tonight, F-CPU people met at the "first jeudi", like
every month. Renaud came (for the first time), i was also
present with CÚdric, Amaury, Nicole, Trollhunter. nicO did not come :-(

As again, what i write here is subject to the kind of incidents
that happen when one is tired, so forgive me in advance for
any inaccuracy :-)

things that i have to do :
 - install RH7.2 on the new 20GB HDD of my laptop (i got a couple CD
    tonight because the First Jeudi is mainly populated by linux geeks)
 - try all the tricks i learnt about ALDEC's Riviera and Cadence's ncsim,
   install Riviera and Translogic's Ease5 and request their demo keys
 - read the new issue of Linux Magazine France
 - update the scripts, (re)write some VHDL and make a new F-CPU snapshot ?

WHYGEE, whishes to have a time machine...
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/