Re: [f-cpu] usage of 64 registers

[Yann Guidon <whygee@f-cpu.org>]

hi all,

i thought that i could be quiet two or three weeks,
away from the computer and enjoying all the gigs that
take place currently in Paris, but it seems i have
to get back to duty sooner as expected...
please be patient and tolerant with me ;-)

Andreas Romeyke wrote:
> Hello,
> 
> On Wed, 27 Mar 2002, Martin Devera wrote:
> 
> > Second question is, how can be the XBar constructed in CMOS ?
> > Is 4*64 to 4*64 xbar simply 1024 pass-thru gates (N-P mos pair)
> > plus tree of invertors to accomodate this fanout ?
> > Or will it consist of latches per port ?
> 
> XBar is a wrecked name of this thing. We mean with XBar really a network
> for connecting ports and units. I prefer a convolved network, like
> Convolved Benes.

in fact, the "Xbar" name is just a name, its realisation depends on
many problems and the used technology.

Currently, the "Xbar" stage of the pipeline is two things :
 - a big buffered line which sends the data from the R7 unit
   to all the EU inputs (the fanout is to be taken into account)
 - a big "MUX" which selects the data from the EU outputs and
   sends it to the R7.
in the middle, there is another MUX which selects the real source
of the data : it's the bypass thing, which deals with partial
writes and reads...
For example, you want
  add.b r1,r2,r3
  add.w r3,r4,r5
so the problem is to select the right words to bypass.
but it's possible to do that without pulling your hair.

> Hope to help you...
thanks ;-)

i'm late for the gig tonight, forgive my short intervention :-)
i'll post in a week or two.

> Bye Art1
WHYGEE
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*************************************************************
To unsubscribe, send an e-mail to majordomo@seul.org with
unsubscribe f-cpu       in the body. http://f-cpu.seul.org/