[f-cpu] second order prefetch in FC0

[devik <devik@cdi.cz>]

Hi,

just one idea. In FC0 load is supposed to trap
on TLB miss (or access violation) before it enters
pipeline. While it is simple it will kill many
indirect addressing performance (foo->bar->baz)
where we can't load pointer early or it will
at least stall whole CPU because data are not
in L0.
On other side I agree that asynchronous load is
not simple (we'd need some load buffers) and it
is not as useful as prefetch (can't be moved
out of control structures).

I got (yet another) crazy idea. We support for
prefetch of a cacheline where some address live.
What about special prefetch which would
prefetch cacheline, then load new address from
it at given offset and prefetch that address too ?

It involves other TLB and adder I know. On other
side it is completely out of critical path and
if we will do real load faster we can simply
discard prefetch.

It would help linked structures, especially trees
and lists. "next" links are typically in first 32
bytes so that it is possible for "item remove"
subroutine to ask for prefetch of item along with
its siblings.
I already invented some way how to force gcc to emit
some prefetches and this one would be possible too.

It is for thinking (for YG: I don't blame FC0 I only
want to share my ideas).

devik

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