Re: [f-cpu] delayed issue

[devik <devik@cdi.cz>]

> > 2) If you map SRs to memory, you will face race conditions and
> > synchronisation problems,
> >  and protection will not be enforced on a register or register group
> > granularity basis.
>
> It's exaclty the same problem for IO register, and it's soon solved.
> It's used by sparc and i'm pretty sur for ATM. There is no need for a
> specific buses, only the use of direct addressing had an interrest.

What's problem with SRs ? They seemed rather elegant to me. If
get/put insns are serializing then all stuff which need serialize
can be put there.
Or did I miss something ?

devik

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