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Re: [f-cpu] asynchronous circuits

Hans Summers wrote: 
On 3/16/06, Jerry <crashfourit@xxxxxxxxx> wrote:

Has implementing the f-cpu with asynchronous circuits been considered?
I have read that up to 40% of total power consumption is due to the
global clock in a cpu, and asynchronous circuits would have other
advantages as well.



I remember our ML discussions about my scheduler proposal. See
http://www.hanssummers.com/computers/fcpu/index.htm .

Well this boils down to gate level logic, somthing that has to be faced
regardless of the abstract views used. From what little I have have seen
with modern CMOS logic power comsumption is used more for driving long lines* rather than clocking, and the problem will get worse in the future. The logic design needed is logic that is compact logic since most of the logic designs have been developed already. Finding the non
-patented ones may be hard.
Note a long line may be 10 gates distant away since wire capactance is
geting larger than the gate capactance of the CMOS gates.

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