Re: [f-cpu] whygee's Nth slaughtered ROP2 version

[nicO <nicolas.boulay@ifrance.com>]

Ben Franchuk a écrit :
> 
> Michael Riepe wrote:
> 
> > I guess 85 MHz in an FPGA is not bad (depends on the FPGA type, of
> > course).  I'd like to see the numbers for the add, mul and shl units,
> > too (for the same target, as far as possible -- the multiplier probably
> > won't fit, but the other EUs should).
> 
> You really will not know the the clock speed until the final product
> is routed. I have seen with my designs clock speed endup 1/3 from
> what the modules run at when all routed together.

Yep, but it's almost always 1/3 so it's always easy to compare.

nicO

> --
> Ben Franchuk --- Pre-historic Cpu's --
> www.jetnet.ab.ca/users/bfranchuk/index.html
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