Rep:Re: Re: [f-cpu] New suggestion about call convention

["Nicolas Boulay" <nicolas.boulay@ifrance.com>]

-----Message d'origine-----
De: "Christophe Avoinne" <christophe.avoinne@laposte.net>
A: <f-cpu@seul.org>
Date: 06/11/02
Objet: Re: Re: [f-cpu] New suggestion about call convention


----- Original Message -----
From: <whygee@club-internet.fr>
To: <f-cpu@seul.org>
Sent: Wednesday, November 06, 2002 12:43 PM
Subject: Re: Re: [f-cpu] New suggestion about call convention


> new_entry_point:
> // allocate stack space here
> storem xyz
> move r63, saved_reg // save return address
> loadaddri old_entry_point, temp_reg
> jump temp_reg, r63 // call original function
> restore_code:
> move saved_reg, r63 // restore return address
> loadm xyz
> // deallocate stack space here
> jump r63
>
>(This is generic code that may still be improved)

hmmmm where do storem and loadm come from ?
and how do you want to implement it ?.....

--- AH ! WHAT DID I TELL YOU, YANN, ABOUT MICHAEL'S LOADM/STOREM ?
MESEEMS
YOU FORGET ONE EPISODE :)

I suppose the main trouble is the fact that we borrow the register
number
from the instruction format to select the right data from the register
set.
Due to this fact, it is highlly extremely difficult to access another
register at the same time.

Just imagine this kind of instruction - getr r1,r2 - as an example. It
reads
the value of the register, the number of which is read from r1, then
store
the value in r2. The main difficulty comes from the fact how to select
the
register pointed by r1 since it is not hardwired in the instruction
format ?
the same trouble arises with loadm/storem as for maskload/maskstore.

For those who needs to understand :

an FCPU instruction format has an opcode field and three register
operand
fields. So when executing an  2r1w instruction, two registers would be
selected in the register set to be read and the third register to be
written
back. The unit in charge of the operation would have two data to read,
compute a new result and then output it. So in fact you link between the
register set and the unit with two source data (in)  and one target data
(out) for the unit. So the instruction decoding operates simultaneously
on
register set and units.

As you can see, there is no way else to select a register through the
instruction format.

Unhopefully, loadm/storem fall into this category, since it uses two
registers to tell us the two numbers of registers to start and end.
First
you can not select all the registers in the same time above two. Second
even
looping innerly you cannot select the in-between registers.

The only solution I see is the following (not sure about the real
format) :

storem r16,[sp],r31 // saving r16-r31

when executing the instruction, we save r16 in [sp]; but instead of
executing next instruction, we reexecute the same instruction slightly
modified until we reach r31: every time we execute this instruction we
increment the first register operand number in the instruction format.
When
the first and the thirds register operand numbers are the same, we go on
the
next instruction.

>>>>That's clear !
But what's up in case of external it ? We wait to finish this
instruction ? -> blocking instruction
In case of access violation ? Typical faulty instruction are not
executed and pointed by a register for the trap handler. But hier, the
execution will partly be executed -> beark !

>>>From timing point of view it's exaclty the same that having n
instructions to do it. That's the usual deal between CISC/RISC (same
work but faster clock with a bigger code (2x compare to x86 even compare
to ARM !)). This implementation require a kind of logique between
instruction buffer and register bank port, so it will slow done
everything.

maskstore mr,[sp],r16 will work the same time : the first 16 bits of mr
will
contain our local registers. Since the third register operand starts
with
r16, having the least significant bit of mr to be 1 means we need to
store
r16 into [sp]. Every time we shift the bit in mr, we increment the third
register operand number in the instruction format until mr becomes 0,
then
we go on the next instruction.

Well I suppose this kind of solution would not be appreciated by a lot
of
people.

>>>What about my fixed one shoot, mload/store instruction ?





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Haut débit à partir de 30 euros/mois : http://www.ifrance.com/_reloc/w

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