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Re: [f-cpu] New suggestion about call convention

Michael Riepe wrote:

>On Wed, Nov 06, 2002 at 11:43:11AM +0100, whygee@club-internet.fr wrote:
>>i get the picture.
>>However, due to the nature of some 2W instructions,
>>the "capo" MUST be done with pairs of registers, on a
>>"granularity" of 2. That is : you can't do half-tone
>>pitch shifting.
i hope that this restriction will not frustrate too much anybdy....

>>Still there is a problem with loadm and storem.
>If loadm/storem aren't available, we can still use explicit
>load/store instructions.
i think that the "explicit" instructions are going to be used for a while
because the LSU and Xbar are not designed to handle 4 words at a time.
They can do 2 words but LSU has only 1 read and 1 write port (+ address).
Otherwise, handling more register at once will explode the bypass 
logic's size.

i hope that nicO understands the problem. So "storem" and "loadm" seem
to be very limited (2 words) and i am not even sure that it is still 
"safe" in FC0.
For example, alignment is a big problem : what to do when the 2 words
are not aligned on a LSU line boundary, or across pages ?....
if strict alignment is required, then the stack will bloat (filled with 
slots). If it is allowed, then a lot of HW problems are to be solved.

If one wants more bandwidth, then a PFQ-based architecture is required,
but it requires a complete redesign of everything.


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