Re: [f-cpu] reg. rotation [Was: New suggestion about call convention]

[Martin Devera <devik@cdi.cz>]

> > of it unfortunately). Example 1 shows the best case (probably
> > return address could be saved in rotated local reg. too) and you
> > can see that is can be really fast.
>
> If I understand you example correctly, you want to protect parameter to not
> being transfered to a saved register, right ? But you still do memory
> transfert and an one cycle in the decoder to do this, plus a cycle for circ
> instruction. I don't see where you expect to have better performance.

eh eh .. Sorry my fault. I recomputed it yesterday and yes you
are right. The only benefit would be fact that memory loads
would not affect saved values whose we saved itself but some "older"
ones which might not be needed soon ...
But on other side these registers would be needed for store by
next sibling subroutine call so that it is nonsence.

> will only use temporary. (I think we need to have some stat about software on
> RISC CPU. Did somebody know a tool or something for that purpose ?).

Hmm, some time ago I patched gcc to give me interdependency information.
The I found http://sourceforge.net/projects/introspector/.
It might do the job you want.

> >From my point of view, the idea isn't to use all of them, but  to use them to
> reduce memory operation and to reduce pipeline bubble. And I think, but
> perhaps I am wrong, that store didn't cost anything (only load introduce
> bubble, from what I remember about whygee LSU).

this leads me to question, is LSU documented somewhere ? I'd be interested
to study it but found nothing except some disscussion.

When I tried to write call to validate my assumptions I found that
I sometimes need to move bunch of parameters from s? to a?. Like in:

f(a,b,c) {
 g(a,b,c); g(a,b,c+1); g(a,b,c+2)
}

where you want to save a,b and c as local vars and later move them
to a?. Would be possible to have unconditional double move which
would be 2r2w and moe 2 regs at the time ? Like:

; t0=addr of g
store -8,[sp],s0
store -8,[sp],s1
store -8,[sp],s2
store -8,[sp],ra
dmove a0,a1,s0,s1
move a2,s2
jmp t0,ra
inc s2,a2
dmove s0,s1,a0,a1
move a2,s2
jmp t0,ra
dmove s0,s1,a0,a1
.....

There is enough room in opcode. What do you think ?
I'm not sure with orthogonality of it ...
devik

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