[f-cpu] Hi -- let me introduce myself

[Beat Steiner <linux@iprolink.ch>]

My name is Beat

I'm not a pro in CPU design, but  I am an electrical engineer with 
general understanding about CPUs.
Grown up on the Commodore 64 (with BASIC and Assembler), now a 
passionate Linux user.
I'm an IEEE member, but I did not work with the IEEE floating point 
specs up to now.

I Like the concepts discussed so far. Especially the instruction-less 
approach.
An operation I already would have liked to have is a 90-degrees-rotation 
of a bit pattern.
This could be easily realized in TTA. Only a "re-wiring" of the bits is 
necessary.

example:
input
00000000
00000100
00000110
11111111
00000110
00000100
00000000
00000000

output
00010000
00111000
01111100
00010000
00010000
00010000
00010000
00010000

Applications: manipulate bitmap graphics, printer drivers, data 
compression, error correction, hash algos


Other suggestion I would like to make:
One register has already been reserved for constant 0
The same way, a register for +1 and -1 could be reserved.
This way, increment and decrement could be replaced by additions.
The -1 constant (0xFFFFFFFFFFFFFFFF) is also interesting in conjunction 
with EXOR
to negate a value. Maybe the +1 register is even not necessary (replace 
by subtract -1).

Yet another suggestion:
Since no FPU is planned, a fixed-point arithmetic support could be 
considered useful.
On 64bit wide registers, we already get a reasonable precision for most 
applications.
This mainly affects shift operations after multiplications and divisions 
to re-align the
results.

The list seems to be quite quiet. Is the project still alive?

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