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Re: [f-cpu] Smooth Register backup issues...
- To: f-cpu@seul.org
- Subject: Re: [f-cpu] Smooth Register backup issues...
- From: linux@iprolink.ch
- Date: Fri, 14 Nov 2003 16:03:45 GMT
- Delivered-to: archiver@seul.org
- Delivered-to: f-cpu-outgoing@seul.org
- Delivered-to: f-cpu@seul.org
- Delivery-date: Fri, 14 Nov 2003 11:04:04 -0500
- Reply-to: f-cpu@seul.org
- Sender: owner-f-cpu@seul.org
> -SRB could be slow : SBR add muxes on the read port of the register bank
> which are on the critical data path
Instead of shadow, I should rather have it called a 4032-bit wide 1 word
deep FIFO. If we shorten the critical data path, we win again. I have
to look how COMPLEXITY is affected. If weget rid of 4032 MUX ports,
it's worth looking at the story.
> Linux is jiffies are about 1kHz. We should try to evaluate network things
> (10 us for a paquet ?) but most of the IO are done by DMA.
AFAIK, it's 100 Hz unless you install a low latency kernel, which
suggests 512 Hz during configure for compile.
Before we talk about winning 1% performance, we should avoid 100% performance
loss (i.e. get the CPU work at all).
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