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gEDA-cvs: pcb.git: branch: master updated (363f4908a4af44a6cf007709bd093cc9ea0ae2aa)



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=========
 Summary
=========

 doc/pcb.texi    |   16 ++++++++++++----
 doc/thermal.pcb |   32 +++++++++++++++++++-------------
 2 files changed, 31 insertions(+), 17 deletions(-)


=================
 Commit Messages
=================

commit 363f4908a4af44a6cf007709bd093cc9ea0ae2aa
Author: Jared Casper <jaredcasper@xxxxxxxxx>
Commit: DJ Delorie <dj@xxxxxxxxxxx>

    Fix pr2136131. Clarify image of thermal in doc.
    
    Also added some text about changing the style of thermal using
    shift-click in the sections that talk about it.

:100644 100644 51989ee... cf3ceb1... M	doc/pcb.texi
:100644 100644 6a26561... bce2f09... M	doc/thermal.pcb

=========
 Changes
=========

commit 363f4908a4af44a6cf007709bd093cc9ea0ae2aa
Author: Jared Casper <jaredcasper@xxxxxxxxx>
Commit: DJ Delorie <dj@xxxxxxxxxxx>

    Fix pr2136131. Clarify image of thermal in doc.
    
    Also added some text about changing the style of thermal using
    shift-click in the sections that talk about it.

diff --git a/doc/pcb.texi b/doc/pcb.texi
index 51989ee..cf3ceb1 100644
--- a/doc/pcb.texi
+++ b/doc/pcb.texi
@@ -623,7 +623,9 @@ clicking @emph{Btn1} with the thermal tool over the pin or via.
 The thermal tool always
 places a thermal to polygons on the active layer, so if the tool doesn't
 seem to work, it's probably because the polygon you want to touch is not
-on the active layer.
+on the active layer.  You can change the style of thermal used or make
+a solid connection by holding down @emph{Shift} while clicking
+@emph{Btn1} with the thermal tool over the pin or via.
 
 @pcb{} is capable of handling complex polygons, but
 using a number of simpler ones improves performance of the connection tracing code.
@@ -1204,8 +1206,10 @@ they are not electrically connected. Use the Thermal tool to make
 the via connect to the plane. Thermals allow the via or pin to
 be heated by a soldering iron without having to heat the entire
 plane. If solid connections were made to the plane, it could be
-nearly impossible to solder. Click on the via again with the
-Thermal tool to remove the connection to the plane.
+nearly impossible to solder. Shift-click on the via with the Thermal
+tool to change the style of thermal used or to make the connection
+solid.  Click on the via again with the Thermal tool to remove the
+connection to the plane.
 
 The Insert-point tool is an editing tool that allows you to add
 points into lines and polygons.  The
@@ -5917,7 +5921,11 @@ or power plane.  Instead of directly connecting to the plane, small "spokes"
 are used to increase the thermal resistance between the pin and the plane.
 Often times these connections are refered to as simply a thermal.  By increasing
 the thermal resistance to the plane, it becomes easier to solder to the
-pin.  The drawing below shows an example of a thermal relief.
+pin.  In the drawing below, the pin on the left is connected to the
+polygon using a solid connection with no thermal relief, the middle
+pin is connected using a thermal, while the pin on the right has no
+connection to the polygon.  In PCB, the ``Thermal'' Tool is used to
+make both a solid connection and one with thermal relief (see @ref{Polygon Objects}).
 
 @center @image{thermal,,,Example of a thermal relief,png}
 
diff --git a/doc/thermal.pcb b/doc/thermal.pcb
index 6a26561..bce2f09 100644
--- a/doc/thermal.pcb
+++ b/doc/thermal.pcb
@@ -793,13 +793,14 @@ Symbol['~' 1200]
 	SymbolLine[1500 3500 2000 3500 800]
 	SymbolLine[2000 3500 2500 3000 800]
 )
-Via[195000 135000 30000 10000 0 10000 "" ""]
-Via[95000 135000 30000 10000 0 10000 "" "thermal(0)"]
+Via[45000 135000 30000 10000 0 10000 "" "thermal(0S)"]
+Via[255000 135000 30000 10000 0 10000 "" ""]
+Via[150000 135000 30000 10000 0 10000 "" "thermal(0)"]
 Layer(1 "component")
 (
 	Polygon("clearpoly")
 	(
-		[55000 95000] [235000 95000] [235000 175000] [55000 175000] 
+		[5000 95000] [290000 95000] [290000 175000] [5000 175000] 
 	)
 )
 Layer(2 "solder")
@@ -828,14 +829,19 @@ Layer(9 "silk")
 )
 Layer(10 "silk")
 (
-	Line[95000 160000 100000 165000 2500 10000 "clearline"]
-	Line[95000 160000 90000 165000 2500 10000 "clearline"]
-	Line[195000 180000 195000 160000 2500 10000 "clearline"]
-	Line[195000 160000 200000 165000 2500 10000 "clearline"]
-	Line[195000 160000 190000 165000 2500 10000 "clearline"]
-	Line[95000 180000 95000 160000 2500 10000 "clearline"]
-	Text[65000 180000 0 200 "Via/Pin With " ""]
-	Text[175000 195000 0 200 "Thermal" ""]
-	Text[160000 180000 0 200 "Via/Pin Without" ""]
-	Text[75000 195000 0 200 "Thermal" ""]
+	Line[255000 180000 255000 160000 2500 10000 "clearline"]
+	Line[255000 160000 260000 165000 2500 10000 "clearline"]
+	Line[45000 160000 50000 165000 2500 10000 "clearline"]
+	Line[45000 160000 40000 165000 2500 10000 "clearline"]
+	Line[45000 180000 45000 160000 2500 10000 "clearline"]
+	Line[255000 160000 250000 165000 2500 10000 "clearline"]
+	Line[150000 160000 155000 165000 2500 10000 "clearline"]
+	Line[150000 160000 145000 165000 2500 10000 "clearline"]
+	Line[150000 180000 150000 160000 2500 10000 "clearline"]
+	Text[220000 190000 0 200 "no connection" ""]
+	Text[15000 180000 0 200 "Via/Pin with " ""]
+	Text[5000 190000 0 200 "solid connection " ""]
+	Text[225000 180000 0 200 "Via/Pin with" ""]
+	Text[120000 180000 0 200 "Via/Pin with " ""]
+	Text[130000 190000 0 200 "thermal" ""]
 )




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