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gEDA-cvs: gaf.git: branch: master updated (1.5.0-20080706-391-g55850bb)
The branch, master has been updated
via 55850bb331afc0596a18dac1807a487cb475b30d (commit)
from da649f4066f8ce35a1717a1d0a298fe82817a8b5 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
=========
Summary
=========
gnetlist/configure.ac | 51 +++++++-------
gnetlist/tests/common/backends.list | 1 +
.../tests/common/outputs/liquidpcb}/.gitignore | 0
.../tests/common/outputs/liquidpcb/JD-output.net | 43 ++++++++++++
.../common/outputs/{PCB => liquidpcb}/JD.retcode | 0
.../common/outputs/liquidpcb/JD_Include-output.net | 43 ++++++++++++
.../JD.retcode => liquidpcb/JD_Include.retcode} | 0
.../liquidpcb/JD_Include_nomunge-output.net | 43 ++++++++++++
.../JD_Include_nomunge.retcode} | 0
.../common/outputs/liquidpcb/JD_Sort-output.net | 43 ++++++++++++
.../{PCB/JD.retcode => liquidpcb/JD_Sort.retcode} | 0
.../outputs/liquidpcb/JD_Sort_nomunge-output.net | 43 ++++++++++++
.../JD_Sort_nomunge.retcode} | 0
.../common/outputs/{PCB => liquidpcb}/Makefile.am | 0
.../outputs/liquidpcb/SlottedOpamps-output.net | 34 ++++++++++
.../JD.retcode => liquidpcb/SlottedOpamps.retcode} | 0
.../outputs/liquidpcb/TwoStageAmp-output.net | 70 ++++++++++++++++++++
.../JD.retcode => liquidpcb/TwoStageAmp.retcode} | 0
.../liquidpcb/TwoStageAmp_Include-output.net | 70 ++++++++++++++++++++
.../TwoStageAmp_Include.retcode} | 0
.../outputs/liquidpcb/TwoStageAmp_Sort-output.net | 70 ++++++++++++++++++++
.../TwoStageAmp_Sort.retcode} | 0
.../common/outputs/liquidpcb/cascade-output.net | 31 +++++++++
.../{PCB/JD.retcode => liquidpcb/cascade.retcode} | 0
.../common/outputs/liquidpcb/multiequal-output.net | 12 ++++
.../JD.retcode => liquidpcb/multiequal.retcode} | 0
.../common/outputs/liquidpcb/netattrib-output.net | 27 ++++++++
.../JD.retcode => liquidpcb/netattrib.retcode} | 0
.../outputs/liquidpcb/powersupply-output.net} | 0
.../JD.retcode => liquidpcb/powersupply.retcode} | 0
.../outputs/liquidpcb/singlenet-output.net} | 4 +-
.../JD.retcode => liquidpcb/singlenet.retcode} | 0
32 files changed, 558 insertions(+), 27 deletions(-)
copy {docs/wiki => gnetlist/tests/common/outputs/liquidpcb}/.gitignore (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/JD-output.net
copy gnetlist/tests/common/outputs/{PCB => liquidpcb}/JD.retcode (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/JD_Include-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/JD_Include.retcode} (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/JD_Include_nomunge-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/JD_Include_nomunge.retcode} (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/JD_Sort-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/JD_Sort.retcode} (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/JD_Sort_nomunge-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/JD_Sort_nomunge.retcode} (100%)
copy gnetlist/tests/common/outputs/{PCB => liquidpcb}/Makefile.am (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/SlottedOpamps-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/SlottedOpamps.retcode} (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/TwoStageAmp.retcode} (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Include-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/TwoStageAmp_Include.retcode} (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Sort-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/TwoStageAmp_Sort.retcode} (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/cascade-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/cascade.retcode} (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/multiequal-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/multiequal.retcode} (100%)
create mode 100644 gnetlist/tests/common/outputs/liquidpcb/netattrib-output.net
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/netattrib.retcode} (100%)
copy gnetlist/tests/{powersupply.liquidpcb => common/outputs/liquidpcb/powersupply-output.net} (100%)
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/powersupply.retcode} (100%)
copy gnetlist/tests/{singlenet.liquidpcb => common/outputs/liquidpcb/singlenet-output.net} (91%)
copy gnetlist/tests/common/outputs/{PCB/JD.retcode => liquidpcb/singlenet.retcode} (100%)
=================
Commit Messages
=================
commit 55850bb331afc0596a18dac1807a487cb475b30d
Author: Peter Clifton <pcjc2@xxxxxxxxx>
Date: Thu Dec 18 19:05:47 2008 +0000
gnetlist: Add new "liquidpcb" backend to the common test-suite
:100644 100644 1de874c... 60c237f... M gnetlist/configure.ac
:100644 100644 780f618... 66c90ba... M gnetlist/tests/common/backends.list
:000000 100644 0000000... 23c1897... A gnetlist/tests/common/outputs/liquidpcb/.gitignore
:000000 100644 0000000... 77947fb... A gnetlist/tests/common/outputs/liquidpcb/JD-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/JD.retcode
:000000 100644 0000000... 77947fb... A gnetlist/tests/common/outputs/liquidpcb/JD_Include-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/JD_Include.retcode
:000000 100644 0000000... 77947fb... A gnetlist/tests/common/outputs/liquidpcb/JD_Include_nomunge-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/JD_Include_nomunge.retcode
:000000 100644 0000000... 77947fb... A gnetlist/tests/common/outputs/liquidpcb/JD_Sort-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/JD_Sort.retcode
:000000 100644 0000000... 77947fb... A gnetlist/tests/common/outputs/liquidpcb/JD_Sort_nomunge-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/JD_Sort_nomunge.retcode
:000000 100644 0000000... bf3dd39... A gnetlist/tests/common/outputs/liquidpcb/Makefile.am
:000000 100644 0000000... 99569d4... A gnetlist/tests/common/outputs/liquidpcb/SlottedOpamps-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/SlottedOpamps.retcode
:000000 100644 0000000... 1ce43e7... A gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp.retcode
:000000 100644 0000000... 1ce43e7... A gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Include-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Include.retcode
:000000 100644 0000000... 1ce43e7... A gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Sort-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Sort.retcode
:000000 100644 0000000... 1216fcf... A gnetlist/tests/common/outputs/liquidpcb/cascade-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/cascade.retcode
:000000 100644 0000000... 5e8776d... A gnetlist/tests/common/outputs/liquidpcb/multiequal-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/multiequal.retcode
:000000 100644 0000000... 9de7863... A gnetlist/tests/common/outputs/liquidpcb/netattrib-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/netattrib.retcode
:000000 100644 0000000... 8089953... A gnetlist/tests/common/outputs/liquidpcb/powersupply-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/powersupply.retcode
:000000 100644 0000000... 53c946c... A gnetlist/tests/common/outputs/liquidpcb/singlenet-output.net
:000000 100644 0000000... 573541a... A gnetlist/tests/common/outputs/liquidpcb/singlenet.retcode
=========
Changes
=========
commit 55850bb331afc0596a18dac1807a487cb475b30d
Author: Peter Clifton <pcjc2@xxxxxxxxx>
Date: Thu Dec 18 19:05:47 2008 +0000
gnetlist: Add new "liquidpcb" backend to the common test-suite
diff --git a/gnetlist/configure.ac b/gnetlist/configure.ac
index 1de874c..60c237f 100644
--- a/gnetlist/configure.ac
+++ b/gnetlist/configure.ac
@@ -452,41 +452,42 @@ AC_CONFIG_FILES([Makefile
tests/hierarchy2/Makefile
tests/drc2/Makefile
tests/common/Makefile
- tests/common/outputs/osmond/Makefile
- tests/common/outputs/pcbpins/Makefile
- tests/common/outputs/redac/Makefile
- tests/common/outputs/switcap/Makefile
- tests/common/outputs/futurenet2/Makefile
- tests/common/outputs/mathematica/Makefile
+ tests/common/outputs/Makefile
+ tests/common/outputs/allegro/Makefile
+ tests/common/outputs/bae/Makefile
+ tests/common/outputs/bom2/Makefile
tests/common/outputs/bom/Makefile
- tests/common/outputs/verilog/Makefile
+ tests/common/outputs/calay/Makefile
tests/common/outputs/cascade/Makefile
- tests/common/outputs/partslist1/Makefile
- tests/common/outputs/spice/Makefile
tests/common/outputs/drc2/Makefile
+ tests/common/outputs/drc/Makefile
+ tests/common/outputs/eagle/Makefile
+ tests/common/outputs/futurenet2/Makefile
tests/common/outputs/geda/Makefile
tests/common/outputs/gossip/Makefile
- tests/common/outputs/systemc/Makefile
+ tests/common/outputs/gsch2pcb/Makefile
+ tests/common/outputs/liquidpcb/Makefile
+ tests/common/outputs/mathematica/Makefile
+ tests/common/outputs/maxascii/Makefile
+ tests/common/outputs/osmond/Makefile
tests/common/outputs/pads/Makefile
- tests/common/outputs/vams/Makefile
- tests/common/outputs/Makefile
+ tests/common/outputs/partslist1/Makefile
tests/common/outputs/partslist2/Makefile
+ tests/common/outputs/partslist3/Makefile
tests/common/outputs/PCBboard/Makefile
- tests/common/outputs/bae/Makefile
- tests/common/outputs/vipec/Makefile
- tests/common/outputs/eagle/Makefile
- tests/common/outputs/protelII/Makefile
tests/common/outputs/PCB/Makefile
- tests/common/outputs/gsch2pcb/Makefile
- tests/common/outputs/vhdl/Makefile
- tests/common/outputs/calay/Makefile
- tests/common/outputs/tango/Makefile
+ tests/common/outputs/pcbpins/Makefile
+ tests/common/outputs/protelII/Makefile
+ tests/common/outputs/redac/Makefile
+ tests/common/outputs/spice/Makefile
tests/common/outputs/spice-sdb/Makefile
- tests/common/outputs/maxascii/Makefile
- tests/common/outputs/bom2/Makefile
- tests/common/outputs/drc/Makefile
- tests/common/outputs/partslist3/Makefile
- tests/common/outputs/allegro/Makefile
+ tests/common/outputs/switcap/Makefile
+ tests/common/outputs/systemc/Makefile
+ tests/common/outputs/tango/Makefile
+ tests/common/outputs/vams/Makefile
+ tests/common/outputs/verilog/Makefile
+ tests/common/outputs/vhdl/Makefile
+ tests/common/outputs/vipec/Makefile
tests/common/inputs/models/Makefile
tests/common/inputs/Makefile
tests/common/inputs/sym/Makefile
diff --git a/gnetlist/tests/common/backends.list b/gnetlist/tests/common/backends.list
index 780f618..66c90ba 100644
--- a/gnetlist/tests/common/backends.list
+++ b/gnetlist/tests/common/backends.list
@@ -11,6 +11,7 @@ futurenet2
geda
gossip
gsch2pcb
+liquidpcb
mathematica
maxascii
osmond
diff --git a/gnetlist/tests/common/outputs/liquidpcb/.gitignore b/gnetlist/tests/common/outputs/liquidpcb/.gitignore
new file mode 100644
index 0000000..23c1897
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/.gitignore
@@ -0,0 +1,3 @@
+Makefile
+Makefile.in
+*~
diff --git a/gnetlist/tests/common/outputs/liquidpcb/JD-output.net b/gnetlist/tests/common/outputs/liquidpcb/JD-output.net
new file mode 100644
index 0000000..77947fb
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/JD-output.net
@@ -0,0 +1,43 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="Vdd1">
+ <netnode component="Rlp" pin=2 />
+ <netnode component="M1" pin=B />
+ <netnode component="M1" pin=S />
+ <netnode component="Vdd" pin=1 />
+ <netnode component="X1" pin=6 />
+ </net>
+ <net name="GND">
+ <netnode component="Cm" pin=2 />
+ <netnode component="Cp" pin=2 />
+ <netnode component="Rlm" pin=2 />
+ <netnode component="Vdd" pin=2 />
+ <netnode component="V1" pin=2 />
+ <netnode component="Rb" pin=1 />
+ <netnode component="X1" pin=7 />
+ <netnode component="X1" pin=2 />
+ </net>
+ <net name="LVH">
+ <netnode component="Rb" pin=2 />
+ <netnode component="M1" pin=D />
+ <netnode component="M1" pin=G />
+ <netnode component="X1" pin=3 />
+ </net>
+ <net name="i">
+ <netnode component="V1" pin=1 />
+ <netnode component="X1" pin=1 />
+ </net>
+ <net name="p">
+ <netnode component="Cp" pin=1 />
+ <netnode component="Rt" pin=1 />
+ <netnode component="Rlp" pin=1 />
+ <netnode component="X1" pin=5 />
+ </net>
+ <net name="m">
+ <netnode component="Cm" pin=1 />
+ <netnode component="Rlm" pin=1 />
+ <netnode component="Rt" pin=2 />
+ <netnode component="X1" pin=4 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/JD.retcode b/gnetlist/tests/common/outputs/liquidpcb/JD.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/JD.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/JD_Include-output.net b/gnetlist/tests/common/outputs/liquidpcb/JD_Include-output.net
new file mode 100644
index 0000000..77947fb
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/JD_Include-output.net
@@ -0,0 +1,43 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="Vdd1">
+ <netnode component="Rlp" pin=2 />
+ <netnode component="M1" pin=B />
+ <netnode component="M1" pin=S />
+ <netnode component="Vdd" pin=1 />
+ <netnode component="X1" pin=6 />
+ </net>
+ <net name="GND">
+ <netnode component="Cm" pin=2 />
+ <netnode component="Cp" pin=2 />
+ <netnode component="Rlm" pin=2 />
+ <netnode component="Vdd" pin=2 />
+ <netnode component="V1" pin=2 />
+ <netnode component="Rb" pin=1 />
+ <netnode component="X1" pin=7 />
+ <netnode component="X1" pin=2 />
+ </net>
+ <net name="LVH">
+ <netnode component="Rb" pin=2 />
+ <netnode component="M1" pin=D />
+ <netnode component="M1" pin=G />
+ <netnode component="X1" pin=3 />
+ </net>
+ <net name="i">
+ <netnode component="V1" pin=1 />
+ <netnode component="X1" pin=1 />
+ </net>
+ <net name="p">
+ <netnode component="Cp" pin=1 />
+ <netnode component="Rt" pin=1 />
+ <netnode component="Rlp" pin=1 />
+ <netnode component="X1" pin=5 />
+ </net>
+ <net name="m">
+ <netnode component="Cm" pin=1 />
+ <netnode component="Rlm" pin=1 />
+ <netnode component="Rt" pin=2 />
+ <netnode component="X1" pin=4 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/JD_Include.retcode b/gnetlist/tests/common/outputs/liquidpcb/JD_Include.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/JD_Include.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/JD_Include_nomunge-output.net b/gnetlist/tests/common/outputs/liquidpcb/JD_Include_nomunge-output.net
new file mode 100644
index 0000000..77947fb
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/JD_Include_nomunge-output.net
@@ -0,0 +1,43 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="Vdd1">
+ <netnode component="Rlp" pin=2 />
+ <netnode component="M1" pin=B />
+ <netnode component="M1" pin=S />
+ <netnode component="Vdd" pin=1 />
+ <netnode component="X1" pin=6 />
+ </net>
+ <net name="GND">
+ <netnode component="Cm" pin=2 />
+ <netnode component="Cp" pin=2 />
+ <netnode component="Rlm" pin=2 />
+ <netnode component="Vdd" pin=2 />
+ <netnode component="V1" pin=2 />
+ <netnode component="Rb" pin=1 />
+ <netnode component="X1" pin=7 />
+ <netnode component="X1" pin=2 />
+ </net>
+ <net name="LVH">
+ <netnode component="Rb" pin=2 />
+ <netnode component="M1" pin=D />
+ <netnode component="M1" pin=G />
+ <netnode component="X1" pin=3 />
+ </net>
+ <net name="i">
+ <netnode component="V1" pin=1 />
+ <netnode component="X1" pin=1 />
+ </net>
+ <net name="p">
+ <netnode component="Cp" pin=1 />
+ <netnode component="Rt" pin=1 />
+ <netnode component="Rlp" pin=1 />
+ <netnode component="X1" pin=5 />
+ </net>
+ <net name="m">
+ <netnode component="Cm" pin=1 />
+ <netnode component="Rlm" pin=1 />
+ <netnode component="Rt" pin=2 />
+ <netnode component="X1" pin=4 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/JD_Include_nomunge.retcode b/gnetlist/tests/common/outputs/liquidpcb/JD_Include_nomunge.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/JD_Include_nomunge.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/JD_Sort-output.net b/gnetlist/tests/common/outputs/liquidpcb/JD_Sort-output.net
new file mode 100644
index 0000000..77947fb
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/JD_Sort-output.net
@@ -0,0 +1,43 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="Vdd1">
+ <netnode component="Rlp" pin=2 />
+ <netnode component="M1" pin=B />
+ <netnode component="M1" pin=S />
+ <netnode component="Vdd" pin=1 />
+ <netnode component="X1" pin=6 />
+ </net>
+ <net name="GND">
+ <netnode component="Cm" pin=2 />
+ <netnode component="Cp" pin=2 />
+ <netnode component="Rlm" pin=2 />
+ <netnode component="Vdd" pin=2 />
+ <netnode component="V1" pin=2 />
+ <netnode component="Rb" pin=1 />
+ <netnode component="X1" pin=7 />
+ <netnode component="X1" pin=2 />
+ </net>
+ <net name="LVH">
+ <netnode component="Rb" pin=2 />
+ <netnode component="M1" pin=D />
+ <netnode component="M1" pin=G />
+ <netnode component="X1" pin=3 />
+ </net>
+ <net name="i">
+ <netnode component="V1" pin=1 />
+ <netnode component="X1" pin=1 />
+ </net>
+ <net name="p">
+ <netnode component="Cp" pin=1 />
+ <netnode component="Rt" pin=1 />
+ <netnode component="Rlp" pin=1 />
+ <netnode component="X1" pin=5 />
+ </net>
+ <net name="m">
+ <netnode component="Cm" pin=1 />
+ <netnode component="Rlm" pin=1 />
+ <netnode component="Rt" pin=2 />
+ <netnode component="X1" pin=4 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/JD_Sort.retcode b/gnetlist/tests/common/outputs/liquidpcb/JD_Sort.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/JD_Sort.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/JD_Sort_nomunge-output.net b/gnetlist/tests/common/outputs/liquidpcb/JD_Sort_nomunge-output.net
new file mode 100644
index 0000000..77947fb
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/JD_Sort_nomunge-output.net
@@ -0,0 +1,43 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="Vdd1">
+ <netnode component="Rlp" pin=2 />
+ <netnode component="M1" pin=B />
+ <netnode component="M1" pin=S />
+ <netnode component="Vdd" pin=1 />
+ <netnode component="X1" pin=6 />
+ </net>
+ <net name="GND">
+ <netnode component="Cm" pin=2 />
+ <netnode component="Cp" pin=2 />
+ <netnode component="Rlm" pin=2 />
+ <netnode component="Vdd" pin=2 />
+ <netnode component="V1" pin=2 />
+ <netnode component="Rb" pin=1 />
+ <netnode component="X1" pin=7 />
+ <netnode component="X1" pin=2 />
+ </net>
+ <net name="LVH">
+ <netnode component="Rb" pin=2 />
+ <netnode component="M1" pin=D />
+ <netnode component="M1" pin=G />
+ <netnode component="X1" pin=3 />
+ </net>
+ <net name="i">
+ <netnode component="V1" pin=1 />
+ <netnode component="X1" pin=1 />
+ </net>
+ <net name="p">
+ <netnode component="Cp" pin=1 />
+ <netnode component="Rt" pin=1 />
+ <netnode component="Rlp" pin=1 />
+ <netnode component="X1" pin=5 />
+ </net>
+ <net name="m">
+ <netnode component="Cm" pin=1 />
+ <netnode component="Rlm" pin=1 />
+ <netnode component="Rt" pin=2 />
+ <netnode component="X1" pin=4 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/JD_Sort_nomunge.retcode b/gnetlist/tests/common/outputs/liquidpcb/JD_Sort_nomunge.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/JD_Sort_nomunge.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/Makefile.am b/gnetlist/tests/common/outputs/liquidpcb/Makefile.am
new file mode 100644
index 0000000..bf3dd39
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/Makefile.am
@@ -0,0 +1,30 @@
+EXTRA_DIST= \
+ cascade-output.net \
+ cascade.retcode \
+ JD_Include_nomunge-output.net \
+ JD_Include_nomunge.retcode \
+ JD_Include-output.net \
+ JD_Include.retcode \
+ JD_nomunge-output.net \
+ JD-output.net \
+ JD.retcode \
+ JD_Sort_nomunge-output.net \
+ JD_Sort_nomunge.retcode \
+ JD_Sort-output.net \
+ JD_Sort.retcode \
+ multiequal-output.net \
+ multiequal.retcode \
+ netattrib-output.net \
+ netattrib.retcode \
+ powersupply-output.net \
+ powersupply.retcode \
+ singlenet-output.net \
+ singlenet.retcode \
+ SlottedOpamps-output.net \
+ SlottedOpamps.retcode \
+ TwoStageAmp_Include-output.net \
+ TwoStageAmp_Include.retcode \
+ TwoStageAmp-output.net \
+ TwoStageAmp.retcode \
+ TwoStageAmp_Sort-output.net \
+ TwoStageAmp_Sort.retcode
diff --git a/gnetlist/tests/common/outputs/liquidpcb/SlottedOpamps-output.net b/gnetlist/tests/common/outputs/liquidpcb/SlottedOpamps-output.net
new file mode 100644
index 0000000..99569d4
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/SlottedOpamps-output.net
@@ -0,0 +1,34 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="minusin_slot4_pin13_b">
+ <netnode component="U1" pin=13 />
+ </net>
+ <net name="plusin_slot4_pin12_a">
+ <netnode component="U1" pin=12 />
+ </net>
+ <net name="minusin_slot3_pin_b">
+ <netnode component="U1" pin=9 />
+ </net>
+ <net name="plusin_slot3_pin10_a">
+ <netnode component="U1" pin=10 />
+ </net>
+ <net name="minusin_slot2_pin6_b">
+ <netnode component="U1" pin=6 />
+ </net>
+ <net name="plusin_slot2_pin5_a">
+ <netnode component="U1" pin=5 />
+ </net>
+ <net name="samenet_output_c">
+ <netnode component="U1" pin=14 />
+ <netnode component="U1" pin=8 />
+ <netnode component="U1" pin=7 />
+ <netnode component="U1" pin=1 />
+ </net>
+ <net name="minusin_slot1_pin_b">
+ <netnode component="U1" pin=2 />
+ </net>
+ <net name="plusin_slot1_pin3_a">
+ <netnode component="U1" pin=3 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/SlottedOpamps.retcode b/gnetlist/tests/common/outputs/liquidpcb/SlottedOpamps.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/SlottedOpamps.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp-output.net b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp-output.net
new file mode 100644
index 0000000..1ce43e7
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp-output.net
@@ -0,0 +1,70 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="unnamed_net2">
+ <netnode component="C2" pin=1 />
+ <netnode component="R8" pin=2 />
+ </net>
+ <net name="Vbase2">
+ <netnode component="R3" pin=1 />
+ <netnode component="C2" pin=2 />
+ <netnode component="R4" pin=2 />
+ <netnode component="Q2" pin=2 />
+ </net>
+ <net name="Vem2">
+ <netnode component="CE2" pin=2 />
+ <netnode component="RE2" pin=2 />
+ <netnode component="Q2" pin=1 />
+ </net>
+ <net name="Vout">
+ <netnode component="Cout" pin=2 />
+ <netnode component="RL" pin=2 />
+ </net>
+ <net name="VColl2">
+ <netnode component="Q2" pin=3 />
+ <netnode component="Cout" pin=1 />
+ <netnode component="RC2" pin=1 />
+ </net>
+ <net name="GND">
+ <netnode component="R4" pin=1 />
+ <netnode component="CE2" pin=1 />
+ <netnode component="RE2" pin=1 />
+ <netnode component="VCC" pin=2 />
+ <netnode component="Vinput" pin=2 />
+ <netnode component="CE1" pin=1 />
+ <netnode component="RL" pin=1 />
+ <netnode component="RE1" pin=1 />
+ <netnode component="R2" pin=1 />
+ </net>
+ <net name="Vcc">
+ <netnode component="R3" pin=2 />
+ <netnode component="RC1" pin=2 />
+ <netnode component="VCC" pin=1 />
+ <netnode component="RC2" pin=2 />
+ <netnode component="R1" pin=2 />
+ </net>
+ <net name="Vin">
+ <netnode component="Vinput" pin=1 />
+ <netnode component="R5" pin=1 />
+ </net>
+ <net name="unnamed_net1">
+ <netnode component="C1" pin=1 />
+ <netnode component="R5" pin=2 />
+ </net>
+ <net name="Vbase1">
+ <netnode component="C1" pin=2 />
+ <netnode component="R2" pin=2 />
+ <netnode component="R1" pin=1 />
+ <netnode component="Q1" pin=2 />
+ </net>
+ <net name="Vem1">
+ <netnode component="CE1" pin=2 />
+ <netnode component="RE1" pin=2 />
+ <netnode component="Q1" pin=1 />
+ </net>
+ <net name="Vcoll1">
+ <netnode component="R8" pin=1 />
+ <netnode component="RC1" pin=1 />
+ <netnode component="Q1" pin=3 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp.retcode b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Include-output.net b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Include-output.net
new file mode 100644
index 0000000..1ce43e7
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Include-output.net
@@ -0,0 +1,70 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="unnamed_net2">
+ <netnode component="C2" pin=1 />
+ <netnode component="R8" pin=2 />
+ </net>
+ <net name="Vbase2">
+ <netnode component="R3" pin=1 />
+ <netnode component="C2" pin=2 />
+ <netnode component="R4" pin=2 />
+ <netnode component="Q2" pin=2 />
+ </net>
+ <net name="Vem2">
+ <netnode component="CE2" pin=2 />
+ <netnode component="RE2" pin=2 />
+ <netnode component="Q2" pin=1 />
+ </net>
+ <net name="Vout">
+ <netnode component="Cout" pin=2 />
+ <netnode component="RL" pin=2 />
+ </net>
+ <net name="VColl2">
+ <netnode component="Q2" pin=3 />
+ <netnode component="Cout" pin=1 />
+ <netnode component="RC2" pin=1 />
+ </net>
+ <net name="GND">
+ <netnode component="R4" pin=1 />
+ <netnode component="CE2" pin=1 />
+ <netnode component="RE2" pin=1 />
+ <netnode component="VCC" pin=2 />
+ <netnode component="Vinput" pin=2 />
+ <netnode component="CE1" pin=1 />
+ <netnode component="RL" pin=1 />
+ <netnode component="RE1" pin=1 />
+ <netnode component="R2" pin=1 />
+ </net>
+ <net name="Vcc">
+ <netnode component="R3" pin=2 />
+ <netnode component="RC1" pin=2 />
+ <netnode component="VCC" pin=1 />
+ <netnode component="RC2" pin=2 />
+ <netnode component="R1" pin=2 />
+ </net>
+ <net name="Vin">
+ <netnode component="Vinput" pin=1 />
+ <netnode component="R5" pin=1 />
+ </net>
+ <net name="unnamed_net1">
+ <netnode component="C1" pin=1 />
+ <netnode component="R5" pin=2 />
+ </net>
+ <net name="Vbase1">
+ <netnode component="C1" pin=2 />
+ <netnode component="R2" pin=2 />
+ <netnode component="R1" pin=1 />
+ <netnode component="Q1" pin=2 />
+ </net>
+ <net name="Vem1">
+ <netnode component="CE1" pin=2 />
+ <netnode component="RE1" pin=2 />
+ <netnode component="Q1" pin=1 />
+ </net>
+ <net name="Vcoll1">
+ <netnode component="R8" pin=1 />
+ <netnode component="RC1" pin=1 />
+ <netnode component="Q1" pin=3 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Include.retcode b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Include.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Include.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Sort-output.net b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Sort-output.net
new file mode 100644
index 0000000..1ce43e7
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Sort-output.net
@@ -0,0 +1,70 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="unnamed_net2">
+ <netnode component="C2" pin=1 />
+ <netnode component="R8" pin=2 />
+ </net>
+ <net name="Vbase2">
+ <netnode component="R3" pin=1 />
+ <netnode component="C2" pin=2 />
+ <netnode component="R4" pin=2 />
+ <netnode component="Q2" pin=2 />
+ </net>
+ <net name="Vem2">
+ <netnode component="CE2" pin=2 />
+ <netnode component="RE2" pin=2 />
+ <netnode component="Q2" pin=1 />
+ </net>
+ <net name="Vout">
+ <netnode component="Cout" pin=2 />
+ <netnode component="RL" pin=2 />
+ </net>
+ <net name="VColl2">
+ <netnode component="Q2" pin=3 />
+ <netnode component="Cout" pin=1 />
+ <netnode component="RC2" pin=1 />
+ </net>
+ <net name="GND">
+ <netnode component="R4" pin=1 />
+ <netnode component="CE2" pin=1 />
+ <netnode component="RE2" pin=1 />
+ <netnode component="VCC" pin=2 />
+ <netnode component="Vinput" pin=2 />
+ <netnode component="CE1" pin=1 />
+ <netnode component="RL" pin=1 />
+ <netnode component="RE1" pin=1 />
+ <netnode component="R2" pin=1 />
+ </net>
+ <net name="Vcc">
+ <netnode component="R3" pin=2 />
+ <netnode component="RC1" pin=2 />
+ <netnode component="VCC" pin=1 />
+ <netnode component="RC2" pin=2 />
+ <netnode component="R1" pin=2 />
+ </net>
+ <net name="Vin">
+ <netnode component="Vinput" pin=1 />
+ <netnode component="R5" pin=1 />
+ </net>
+ <net name="unnamed_net1">
+ <netnode component="C1" pin=1 />
+ <netnode component="R5" pin=2 />
+ </net>
+ <net name="Vbase1">
+ <netnode component="C1" pin=2 />
+ <netnode component="R2" pin=2 />
+ <netnode component="R1" pin=1 />
+ <netnode component="Q1" pin=2 />
+ </net>
+ <net name="Vem1">
+ <netnode component="CE1" pin=2 />
+ <netnode component="RE1" pin=2 />
+ <netnode component="Q1" pin=1 />
+ </net>
+ <net name="Vcoll1">
+ <netnode component="R8" pin=1 />
+ <netnode component="RC1" pin=1 />
+ <netnode component="Q1" pin=3 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Sort.retcode b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Sort.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/TwoStageAmp_Sort.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/cascade-output.net b/gnetlist/tests/common/outputs/liquidpcb/cascade-output.net
new file mode 100644
index 0000000..1216fcf
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/cascade-output.net
@@ -0,0 +1,31 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="unnamed_net6">
+ <netnode component="AMP2" pin=1 />
+ <netnode component="T1" pin=2 />
+ </net>
+ <net name="unnamed_net5">
+ <netnode component="T1" pin=1 />
+ <netnode component="MX1" pin=2 />
+ </net>
+ <net name="unnamed_net4">
+ <netnode component="MX1" pin=1 />
+ <netnode component="FL1" pin=2 />
+ </net>
+ <net name="unnamed_net3">
+ <netnode component="FL1" pin=1 />
+ <netnode component="DEF1" pin=2 />
+ </net>
+ <net name="unnamed_net2">
+ <netnode component="DEF1" pin=1 />
+ <netnode component="AMP1" pin=2 />
+ </net>
+ <net name="unnamed_net1">
+ <netnode component="AMP1" pin=1 />
+ <netnode component="SOURCE" pin=1 />
+ </net>
+ <net name="GND">
+ <netnode component="DEFAULTS" pin=1 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/cascade.retcode b/gnetlist/tests/common/outputs/liquidpcb/cascade.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/cascade.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/multiequal-output.net b/gnetlist/tests/common/outputs/liquidpcb/multiequal-output.net
new file mode 100644
index 0000000..5e8776d
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/multiequal-output.net
@@ -0,0 +1,12 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="GND">
+ <netnode component="V1" pin=2 />
+ <netnode component="R1" pin=1 />
+ </net>
+ <net name="unnamed_net1">
+ <netnode component="V1" pin=1 />
+ <netnode component="R1" pin=2 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/multiequal.retcode b/gnetlist/tests/common/outputs/liquidpcb/multiequal.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/multiequal.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/netattrib-output.net b/gnetlist/tests/common/outputs/liquidpcb/netattrib-output.net
new file mode 100644
index 0000000..9de7863
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/netattrib-output.net
@@ -0,0 +1,27 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="unnamed_net1">
+ <netnode component="U300" pin=2 />
+ </net>
+ <net name="netattrib">
+ <netnode component="U200" pin=2 />
+ <netnode component="U100" pin=5 />
+ </net>
+ <net name="GND">
+ <netnode component="U300" pin=7 />
+ <netnode component="U200" pin=7 />
+ <netnode component="U100" pin=7 />
+ </net>
+ <net name="Vcc">
+ <netnode component="U300" pin=14 />
+ <netnode component="U200" pin=14 />
+ <netnode component="U100" pin=14 />
+ </net>
+ <net name="one">
+ <netnode component="F1" pin=1 />
+ <netnode component="U300" pin=1 />
+ <netnode component="U200" pin=1 />
+ <netnode component="U100" pin=3 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/netattrib.retcode b/gnetlist/tests/common/outputs/liquidpcb/netattrib.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/netattrib.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/powersupply-output.net b/gnetlist/tests/common/outputs/liquidpcb/powersupply-output.net
new file mode 100644
index 0000000..8089953
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/powersupply-output.net
@@ -0,0 +1,57 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="ten">
+ <netnode component="U2" pin=1 />
+ <netnode component="R1" pin=2 />
+ <netnode component="C3" pin=1 />
+ <netnode component="R2" pin=1 />
+ </net>
+ <net name="eleven">
+ <netnode component="U2" pin=2 />
+ <netnode component="C4" pin=1 />
+ <netnode component="R2" pin=2 />
+ </net>
+ <net name="GND">
+ <netnode component="CONN1" pin=3 />
+ </net>
+ <net name="one">
+ <netnode component="S1" pin=1 />
+ <netnode component="CONN1" pin=1 />
+ </net>
+ <net name="five">
+ <netnode component="CONN1" pin=2 />
+ <netnode component="T1" pin=2 />
+ </net>
+ <net name="three">
+ <netnode component="T1" pin=1 />
+ <netnode component="F1" pin=2 />
+ </net>
+ <net name="two">
+ <netnode component="S1" pin=2 />
+ <netnode component="F1" pin=1 />
+ </net>
+ <net name="six">
+ <netnode component="T1" pin=3 />
+ <netnode component="U1" pin=4 />
+ </net>
+ <net name="seven">
+ <netnode component="T1" pin=4 />
+ <netnode component="U1" pin=3 />
+ </net>
+ <net name="nine">
+ <netnode component="C4" pin=2 />
+ <netnode component="C3" pin=2 />
+ <netnode component="R1" pin=3 />
+ <netnode component="R1" pin=1 />
+ <netnode component="C2" pin=2 />
+ <netnode component="C1" pin=2 />
+ <netnode component="U1" pin=2 />
+ </net>
+ <net name="eight">
+ <netnode component="U2" pin=3 />
+ <netnode component="C2" pin=1 />
+ <netnode component="C1" pin=1 />
+ <netnode component="U1" pin=1 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/powersupply.retcode b/gnetlist/tests/common/outputs/liquidpcb/powersupply.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/powersupply.retcode
@@ -0,0 +1 @@
+0
diff --git a/gnetlist/tests/common/outputs/liquidpcb/singlenet-output.net b/gnetlist/tests/common/outputs/liquidpcb/singlenet-output.net
new file mode 100644
index 0000000..53c946c
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/singlenet-output.net
@@ -0,0 +1,22 @@
+<LiquidPCB>
+ <netlist name="Main netlist">
+ <net name="SING_N_2">
+ <netnode component="U100" pin=1 />
+ <netnode component="U100" pin=3 />
+ </net>
+ <net name="GND">
+ <netnode component="U100" pin=7 />
+ </net>
+ <net name="Vcc">
+ <netnode component="U100" pin=14 />
+ </net>
+ <net name="SING_N">
+ <netnode component="U100" pin=4 />
+ <netnode component="U100" pin=5 />
+ <netnode component="U100" pin=10 />
+ <netnode component="U100" pin=8 />
+ <netnode component="U100" pin=9 />
+ <netnode component="U100" pin=6 />
+ </net>
+ </netlist>
+</LiquidPCB>
diff --git a/gnetlist/tests/common/outputs/liquidpcb/singlenet.retcode b/gnetlist/tests/common/outputs/liquidpcb/singlenet.retcode
new file mode 100644
index 0000000..573541a
--- /dev/null
+++ b/gnetlist/tests/common/outputs/liquidpcb/singlenet.retcode
@@ -0,0 +1 @@
+0
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