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gEDA-cvs: CVS update: 7447.vhdl



  User: ahvezda 
  Date: 05/02/23 22:55:34

  Modified:    .        7447.vhdl multiequal.spice-sdb netattrib.geda
                        powersupply.allegro powersupply.bae
                        powersupply.geda powersupply.maxascii
                        powersupply.pads powersupply.protelII
                        powersupply.tango skt.switcap stack.geda
  Log:
  Updated gnetlist golden regression files
  
  
  
  
  Revision  Changes    Path
  1.5       +122 -122  eda/geda/devel/gnetlist/tests/7447.vhdl
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: 7447.vhdl
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/7447.vhdl,v
  retrieving revision 1.4
  retrieving revision 1.5
  diff -u -b -r1.4 -r1.5
  --- 7447.vhdl	4 Mar 2001 23:31:13 -0000	1.4
  +++ 7447.vhdl	24 Feb 2005 03:55:26 -0000	1.5
  @@ -12,22 +12,21 @@
           P4 : in Std_Logic;
           P2 : in Std_Logic;
           P1 : in Std_Logic;
  +        P9 : out Std_Logic;
  +        P8 : out Std_Logic;
  +        P3 : out Std_Logic;
           P14 : out Std_Logic;
           P13 : out Std_Logic;
           P12 : out Std_Logic;
           P11 : out Std_Logic;
  -        P10 : out Std_Logic;
  -        P9 : out Std_Logic;
  -        P8 : out Std_Logic;
  -        P3 : out Std_Logic);
  +        P10 : out Std_Logic);
   END not found;
   
   
   -- Secondary unit
   ARCHITECTURE netlist OF not found IS
  -    COMPONENT nand2
  +    COMPONENT neg
       PORT (
  -        IN1 : in Std_Logic;
           IN0 : in Std_Logic;
           OUT0 : out Std_Logic);
       END COMPONENT ;
  @@ -39,50 +38,51 @@
           OUT0 : out Std_Logic);
       END COMPONENT ;
   
  -    COMPONENT nor3
  +    COMPONENT nand6
       PORT (
  +        IN5 : in Std_Logic;
  +        IN4 : in Std_Logic;
  +        IN3 : in Std_Logic;
           IN2 : in Std_Logic;
           IN1 : in Std_Logic;
           IN0 : in Std_Logic;
           OUT0 : out Std_Logic);
       END COMPONENT ;
   
  -    COMPONENT nor2
  +    COMPONENT and4
       PORT (
  +        IN3 : in Std_Logic;
  +        IN2 : in Std_Logic;
           IN1 : in Std_Logic;
           IN0 : in Std_Logic;
           OUT0 : out Std_Logic);
       END COMPONENT ;
   
  -    COMPONENT neg
  +    COMPONENT and3
       PORT (
  +        IN2 : in Std_Logic;
  +        IN1 : in Std_Logic;
           IN0 : in Std_Logic;
           OUT0 : out Std_Logic);
       END COMPONENT ;
   
  -    COMPONENT nand6
  +    COMPONENT nor3
       PORT (
  -        IN5 : in Std_Logic;
  -        IN4 : in Std_Logic;
  -        IN3 : in Std_Logic;
           IN2 : in Std_Logic;
           IN1 : in Std_Logic;
           IN0 : in Std_Logic;
           OUT0 : out Std_Logic);
       END COMPONENT ;
   
  -    COMPONENT and4
  +    COMPONENT nor2
       PORT (
  -        IN3 : in Std_Logic;
  -        IN2 : in Std_Logic;
           IN1 : in Std_Logic;
           IN0 : in Std_Logic;
           OUT0 : out Std_Logic);
       END COMPONENT ;
   
  -    COMPONENT and3
  +    COMPONENT nand2
       PORT (
  -        IN2 : in Std_Logic;
           IN1 : in Std_Logic;
           IN0 : in Std_Logic;
           OUT0 : out Std_Logic);
  @@ -136,6 +136,16 @@
       SIGNAL unnamed_net1 : Std_Logic;
   BEGIN
   -- Architecture statement part
  +    U23 : neg
  +    PORT MAP (
  +        OUT0 => OUTPUTCn,
  +        IN0 => unnamed_net18);
  +
  +    U39 : neg
  +    PORT MAP (
  +        OUT0 => OUTPUTFn,
  +        IN0 => unnamed_net25);
  +
       U38 : nor3
       PORT MAP (
           OUT0 => unnamed_net30,
  @@ -143,6 +153,11 @@
           IN1 => unnamed_net31,
           IN2 => unnamed_net11);
   
  +    U22 : neg
  +    PORT MAP (
  +        OUT0 => OUTPUTBn,
  +        IN0 => unnamed_net30);
  +
       U37 : and4
       PORT MAP (
           OUT0 => unnamed_net28,
  @@ -151,6 +166,11 @@
           IN2 => unnamed_net3,
           IN3 => unnamed_net2);
   
  +    U21 : neg
  +    PORT MAP (
  +        OUT0 => OUTPUTAn,
  +        IN0 => unnamed_net16);
  +
       U36 : and3
       PORT MAP (
           OUT0 => unnamed_net29,
  @@ -158,6 +178,12 @@
           IN1 => unnamed_net5,
           IN2 => unnamed_net4);
   
  +    U20 : nor2
  +    PORT MAP (
  +        OUT0 => unnamed_net27,
  +        IN0 => unnamed_net28,
  +        IN1 => unnamed_net29);
  +
       U35 : and3
       PORT MAP (
           OUT0 => unnamed_net26,
  @@ -193,6 +219,12 @@
           IN1 => unnamed_net5,
           IN2 => unnamed_net1);
   
  +    U9 : and2
  +    PORT MAP (
  +        OUT0 => unnamed_net10,
  +        IN0 => unnamed_net6,
  +        IN1 => unnamed_net1);
  +
       U30 : and3
       PORT MAP (
           OUT0 => unnamed_net32,
  @@ -200,76 +232,58 @@
           IN1 => unnamed_net5,
           IN2 => unnamed_net1);
   
  -    U29 : and3
  -    PORT MAP (
  -        OUT0 => unnamed_net31,
  -        IN0 => unnamed_net6,
  -        IN1 => unnamed_net2,
  -        IN2 => unnamed_net4);
  -
  -    U28 : and4
  -    PORT MAP (
  -        OUT0 => unnamed_net17,
  -        IN0 => unnamed_net8,
  -        IN1 => unnamed_net3,
  -        IN2 => unnamed_net2,
  -        IN3 => unnamed_net4);
  -
  -    U27 : nand6
  -    PORT MAP (
  -        OUT0 => RIPPLE_BLANK_OUTn,
  -        IN0 => LAMP_TESTn,
  -        IN1 => RIPPLE_BLANK_INn,
  -        IN2 => unnamed_net8,
  -        IN3 => unnamed_net3,
  -        IN4 => unnamed_net2,
  -        IN5 => unnamed_net1);
  -
  -    U26 : neg
  +    U8 : and2
       PORT MAP (
  -        OUT0 => unnamed_net8,
  -        IN0 => INPUTD);
  +        OUT0 => unnamed_net9,
  +        IN0 => unnamed_net7,
  +        IN1 => unnamed_net5);
   
  -    U40 : neg
  +    U7 : nand2
       PORT MAP (
  -        OUT0 => OUTPUTGn,
  -        IN0 => unnamed_net27);
  +        OUT0 => unnamed_net7,
  +        IN0 => RIPPLE_BLANK_OUTn,
  +        IN1 => unnamed_net8);
   
  -    U39 : neg
  +    U6 : nand2
       PORT MAP (
  -        OUT0 => OUTPUTFn,
  -        IN0 => unnamed_net25);
  +        OUT0 => unnamed_net6,
  +        IN0 => RIPPLE_BLANK_OUTn,
  +        IN1 => unnamed_net3);
   
  -    U25 : neg
  +    U5 : nand2
       PORT MAP (
  -        OUT0 => OUTPUTEn,
  -        IN0 => unnamed_net24);
  +        OUT0 => unnamed_net5,
  +        IN0 => RIPPLE_BLANK_OUTn,
  +        IN1 => unnamed_net2);
   
  -    U24 : neg
  +    U4 : nand2
       PORT MAP (
  -        OUT0 => OUTPUTDn,
  -        IN0 => unnamed_net20);
  +        OUT0 => unnamed_net4,
  +        IN0 => RIPPLE_BLANK_OUTn,
  +        IN1 => unnamed_net1);
   
  -    U23 : neg
  +    U3 : nand2
       PORT MAP (
  -        OUT0 => OUTPUTCn,
  -        IN0 => unnamed_net18);
  +        OUT0 => unnamed_net3,
  +        IN0 => LAMP_TESTn,
  +        IN1 => INPUTC);
   
  -    U22 : neg
  +    U2 : nand2
       PORT MAP (
  -        OUT0 => OUTPUTBn,
  -        IN0 => unnamed_net30);
  +        OUT0 => unnamed_net2,
  +        IN0 => LAMP_TESTn,
  +        IN1 => INPUTB);
   
  -    U21 : neg
  +    U40 : neg
       PORT MAP (
  -        OUT0 => OUTPUTAn,
  -        IN0 => unnamed_net16);
  +        OUT0 => OUTPUTGn,
  +        IN0 => unnamed_net27);
   
  -    U20 : nor2
  +    U1 : nand2
       PORT MAP (
  -        OUT0 => unnamed_net27,
  -        IN0 => unnamed_net28,
  -        IN1 => unnamed_net29);
  +        OUT0 => unnamed_net1,
  +        IN0 => LAMP_TESTn,
  +        IN1 => INPUTA);
   
       U19 : nor3
       PORT MAP (
  @@ -310,6 +324,13 @@
           IN0 => unnamed_net3,
           IN1 => unnamed_net5);
   
  +    U29 : and3
  +    PORT MAP (
  +        OUT0 => unnamed_net31,
  +        IN0 => unnamed_net6,
  +        IN1 => unnamed_net2,
  +        IN2 => unnamed_net4);
  +
       U13 : and2
       PORT MAP (
           OUT0 => unnamed_net14,
  @@ -322,71 +343,50 @@
           IN0 => unnamed_net6,
           IN1 => unnamed_net2);
   
  +    U28 : and4
  +    PORT MAP (
  +        OUT0 => unnamed_net17,
  +        IN0 => unnamed_net8,
  +        IN1 => unnamed_net3,
  +        IN2 => unnamed_net2,
  +        IN3 => unnamed_net4);
  +
       U11 : and2
       PORT MAP (
           OUT0 => unnamed_net12,
           IN0 => unnamed_net7,
           IN1 => unnamed_net6);
   
  -    U10 : and2
  -    PORT MAP (
  -        OUT0 => unnamed_net11,
  -        IN0 => unnamed_net7,
  -        IN1 => unnamed_net5);
  -
  -    U9 : and2
  +    U27 : nand6
       PORT MAP (
  -        OUT0 => unnamed_net10,
  -        IN0 => unnamed_net6,
  -        IN1 => unnamed_net1);
  +        OUT0 => RIPPLE_BLANK_OUTn,
  +        IN0 => LAMP_TESTn,
  +        IN1 => RIPPLE_BLANK_INn,
  +        IN2 => unnamed_net8,
  +        IN3 => unnamed_net3,
  +        IN4 => unnamed_net2,
  +        IN5 => unnamed_net1);
   
  -    U8 : and2
  +    U10 : and2
       PORT MAP (
  -        OUT0 => unnamed_net9,
  +        OUT0 => unnamed_net11,
           IN0 => unnamed_net7,
           IN1 => unnamed_net5);
   
  -    U7 : nand2
  -    PORT MAP (
  -        OUT0 => unnamed_net7,
  -        IN0 => RIPPLE_BLANK_OUTn,
  -        IN1 => unnamed_net8);
  -
  -    U6 : nand2
  -    PORT MAP (
  -        OUT0 => unnamed_net6,
  -        IN0 => RIPPLE_BLANK_OUTn,
  -        IN1 => unnamed_net3);
  -
  -    U5 : nand2
  -    PORT MAP (
  -        OUT0 => unnamed_net5,
  -        IN0 => RIPPLE_BLANK_OUTn,
  -        IN1 => unnamed_net2);
  -
  -    U4 : nand2
  -    PORT MAP (
  -        OUT0 => unnamed_net4,
  -        IN0 => RIPPLE_BLANK_OUTn,
  -        IN1 => unnamed_net1);
  -
  -    U3 : nand2
  +    U26 : neg
       PORT MAP (
  -        OUT0 => unnamed_net3,
  -        IN0 => LAMP_TESTn,
  -        IN1 => INPUTC);
  +        OUT0 => unnamed_net8,
  +        IN0 => INPUTD);
   
  -    U2 : nand2
  +    U25 : neg
       PORT MAP (
  -        OUT0 => unnamed_net2,
  -        IN0 => LAMP_TESTn,
  -        IN1 => INPUTB);
  +        OUT0 => OUTPUTEn,
  +        IN0 => unnamed_net24);
   
  -    U1 : nand2
  +    U24 : neg
       PORT MAP (
  -        OUT0 => unnamed_net1,
  -        IN0 => LAMP_TESTn,
  -        IN1 => INPUTA);
  +        OUT0 => OUTPUTDn,
  +        IN0 => unnamed_net20);
   
   -- Signal assignment part
   INPUTA <= P7;
  @@ -395,12 +395,12 @@
   INPUTD <= P4;
   RIPPLE_BLANK_INn <= P2;
   LAMP_TESTn <= P1;
  +P9 <= OUTPUTFn;
  +P8 <= OUTPUTGn;
  +P3 <= RIPPLE_BLANK_OUTn;
   P14 <= OUTPUTAn;
   P13 <= OUTPUTBn;
   P12 <= OUTPUTCn;
   P11 <= OUTPUTDn;
   P10 <= OUTPUTEn;
  -P9 <= OUTPUTFn;
  -P8 <= OUTPUTGn;
  -P3 <= RIPPLE_BLANK_OUTn;
   END netlist;
  
  
  
  1.4       +1 -1      eda/geda/devel/gnetlist/tests/multiequal.spice-sdb
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: multiequal.spice-sdb
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/multiequal.spice-sdb,v
  retrieving revision 1.3
  retrieving revision 1.4
  diff -u -b -r1.3 -r1.4
  --- multiequal.spice-sdb	29 Dec 2004 05:15:12 -0000	1.3
  +++ multiequal.spice-sdb	24 Feb 2005 03:55:26 -0000	1.4
  @@ -6,6 +6,6 @@
   * Documentation at http://www.brorson.com/gEDA/SPICE/   *
   *********************************************************
   V1 1 0 DC 1V
  -R1 0 1 20  
   .OPTIONS abotol=1e-11
  +R1 0 1 20  
   .END
  
  
  
  1.5       +1 -1      eda/geda/devel/gnetlist/tests/netattrib.geda
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: netattrib.geda
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/netattrib.geda,v
  retrieving revision 1.4
  retrieving revision 1.5
  diff -u -b -r1.4 -r1.5
  --- netattrib.geda	4 Nov 2002 04:30:39 -0000	1.4
  +++ netattrib.geda	24 Feb 2005 03:55:26 -0000	1.5
  @@ -8,9 +8,9 @@
   START components
   
   F1 device=FUSE
  +U100 device=7400
   U300 device=7404
   U200 device=7404
  -U100 device=7400
   
   END components
   
  
  
  
  1.2       +6 -6      eda/geda/devel/gnetlist/tests/powersupply.allegro
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: powersupply.allegro
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/powersupply.allegro,v
  retrieving revision 1.1
  retrieving revision 1.2
  diff -u -b -r1.1 -r1.2
  --- powersupply.allegro	13 Aug 2002 03:02:53 -0000	1.1
  +++ powersupply.allegro	24 Feb 2005 03:55:26 -0000	1.2
  @@ -1,16 +1,16 @@
   (Allegro netlister by M. Ettus)
   $PACKAGES
  -! LM317! LM317; U2
  +! FUSE! FUSE; F1
  +! RESISTOR! 220; R2
  +! MAINS_CONNECTOR! MAINS_CONNECTOR; CONN1
   ! POLARIZED_CAPACITOR! 1uf; C4
  -! POLARIZED_CAPACITOR! 22uF; C3
   ! VARIABLE_RESISTOR! 5k; R1
  +! POLARIZED_CAPACITOR! 22uF; C3
   ! POLARIZED_CAPACITOR! 0.1uF; C2
  -! RESISTOR! 220; R2
  -! POLARIZED_CAPACITOR! POLARIZED_CAPACITOR; C1
   ! SPST! SPST; S1
  -! MAINS_CONNECTOR! MAINS_CONNECTOR; CONN1
  +! POLARIZED_CAPACITOR! POLARIZED_CAPACITOR; C1
   ! transformer! transformer; T1
  -! FUSE! FUSE; F1
  +! LM317! LM317; U2
   ! DIODE-BRIDGE! DIODE-BRIDGE; U1
   $NETS
   ten; U2.1,
  
  
  
  1.2       +6 -6      eda/geda/devel/gnetlist/tests/powersupply.bae
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: powersupply.bae
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/powersupply.bae,v
  retrieving revision 1.1
  retrieving revision 1.2
  diff -u -b -r1.1 -r1.2
  --- powersupply.bae	13 Aug 2002 03:02:53 -0000	1.1
  +++ powersupply.bae	24 Feb 2005 03:55:26 -0000	1.2
  @@ -1,16 +1,16 @@
   LAYOUT board;
   PARTS
  -    U2 : unknown;
  +    F1 : unknown;
  +    R2 : unknown;
  +    CONN1 : unknown;
       C4 : unknown;
  -    C3 : unknown;
       R1 : unknown;
  +    C3 : unknown;
       C2 : unknown;
  -    R2 : unknown;
  -    C1 : unknown;
       S1 : unknown;
  -    CONN1 : unknown;
  +    C1 : unknown;
       T1 : unknown;
  -    F1 : unknown;
  +    U2 : unknown;
       U1 : unknown;
   CONNECT
       /'ten'/ U2.1=R1.2=C3.1=R2.1;
  
  
  
  1.2       +6 -6      eda/geda/devel/gnetlist/tests/powersupply.geda
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: powersupply.geda
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/powersupply.geda,v
  retrieving revision 1.1
  retrieving revision 1.2
  diff -u -b -r1.1 -r1.2
  --- powersupply.geda	13 Aug 2002 03:02:53 -0000	1.1
  +++ powersupply.geda	24 Feb 2005 03:55:26 -0000	1.2
  @@ -7,17 +7,17 @@
   
   START components
   
  -U2 device=LM317
  +F1 device=FUSE
  +R2 device=RESISTOR
  +CONN1 device=MAINS_CONNECTOR
   C4 device=POLARIZED_CAPACITOR
  -C3 device=POLARIZED_CAPACITOR
   R1 device=VARIABLE_RESISTOR
  +C3 device=POLARIZED_CAPACITOR
   C2 device=POLARIZED_CAPACITOR
  -R2 device=RESISTOR
  -C1 device=POLARIZED_CAPACITOR
   S1 device=SPST
  -CONN1 device=MAINS_CONNECTOR
  +C1 device=POLARIZED_CAPACITOR
   T1 device=transformer
  -F1 device=FUSE
  +U2 device=LM317
   U1 device=DIODE-BRIDGE
   
   END components
  
  
  
  1.2       +6 -6      eda/geda/devel/gnetlist/tests/powersupply.maxascii
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: powersupply.maxascii
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/powersupply.maxascii,v
  retrieving revision 1.1
  retrieving revision 1.2
  diff -u -b -r1.1 -r1.2
  --- powersupply.maxascii	13 Aug 2002 03:02:53 -0000	1.1
  +++ powersupply.maxascii	24 Feb 2005 03:55:26 -0000	1.2
  @@ -1,16 +1,16 @@
   *OrCAD
   *START
  -*COMP U2	"unknown"
  +*COMP F1	"unknown"
  +*COMP R2	"unknown"
  +*COMP CONN1	"unknown"
   *COMP C4	"unknown"
  -*COMP C3	"unknown"
   *COMP R1	"unknown"
  +*COMP C3	"unknown"
   *COMP C2	"unknown"
  -*COMP R2	"unknown"
  -*COMP C1	"unknown"
   *COMP S1	"unknown"
  -*COMP CONN1	"unknown"
  +*COMP C1	"unknown"
   *COMP T1	"unknown"
  -*COMP F1	"unknown"
  +*COMP U2	"unknown"
   *COMP U1	"unknown"
   *NET "ten"
   *NET "ten" U2."1" R1."2" C3."1" R2."1"
  
  
  
  1.3       +6 -6      eda/geda/devel/gnetlist/tests/powersupply.pads
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: powersupply.pads
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/powersupply.pads,v
  retrieving revision 1.2
  retrieving revision 1.3
  diff -u -b -r1.2 -r1.3
  --- powersupply.pads	4 Jan 2004 03:17:47 -0000	1.2
  +++ powersupply.pads	24 Feb 2005 03:55:26 -0000	1.3
  @@ -1,17 +1,17 @@
   !PADS-POWERPCB-V3.0-MILS!
   
   *PART*
  -U2	unknown
  +F1	unknown
  +R2	unknown
  +CONN1	unknown
   C4	unknown
  -C3	unknown
   R1	unknown
  +C3	unknown
   C2	unknown
  -R2	unknown
  -C1	unknown
   S1	unknown
  -CONN1	unknown
  +C1	unknown
   T1	unknown
  -F1	unknown
  +U2	unknown
   U1	unknown
   
   *NET*
  
  
  
  1.3       +26 -26    eda/geda/devel/gnetlist/tests/powersupply.protelII
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: powersupply.protelII
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/powersupply.protelII,v
  retrieving revision 1.2
  retrieving revision 1.3
  diff -u -b -r1.2 -r1.3
  --- powersupply.protelII	31 Dec 2003 05:03:51 -0000	1.2
  +++ powersupply.protelII	24 Feb 2005 03:55:26 -0000	1.3
  @@ -1,13 +1,13 @@
   PROTEL NETLIST 2.0
   [
   DESIGNATOR
  -U2
  +F1
   FOOTPRINT
   unknown
   PARTTYPE
  -LM317
  +FUSE
   DESCRIPTION
  -LM317
  +FUSE
   Part Field 1
   *
   Part Field 2
  @@ -59,13 +59,13 @@
   ]
   [
   DESIGNATOR
  -C4
  +R2
   FOOTPRINT
   unknown
   PARTTYPE
  -1uf
  +220
   DESCRIPTION
  -POLARIZED_CAPACITOR
  +RESISTOR
   Part Field 1
   *
   Part Field 2
  @@ -117,13 +117,13 @@
   ]
   [
   DESIGNATOR
  -C3
  +CONN1
   FOOTPRINT
   unknown
   PARTTYPE
  -22uF
  +MAINS_CONNECTOR
   DESCRIPTION
  -POLARIZED_CAPACITOR
  +MAINS_CONNECTOR
   Part Field 1
   *
   Part Field 2
  @@ -175,13 +175,13 @@
   ]
   [
   DESIGNATOR
  -R1
  +C4
   FOOTPRINT
   unknown
   PARTTYPE
  -5k
  +1uf
   DESCRIPTION
  -VARIABLE_RESISTOR
  +POLARIZED_CAPACITOR
   Part Field 1
   *
   Part Field 2
  @@ -233,13 +233,13 @@
   ]
   [
   DESIGNATOR
  -C2
  +R1
   FOOTPRINT
   unknown
   PARTTYPE
  -0.1uF
  +5k
   DESCRIPTION
  -POLARIZED_CAPACITOR
  +VARIABLE_RESISTOR
   Part Field 1
   *
   Part Field 2
  @@ -291,13 +291,13 @@
   ]
   [
   DESIGNATOR
  -R2
  +C3
   FOOTPRINT
   unknown
   PARTTYPE
  -220
  +22uF
   DESCRIPTION
  -RESISTOR
  +POLARIZED_CAPACITOR
   Part Field 1
   *
   Part Field 2
  @@ -349,11 +349,11 @@
   ]
   [
   DESIGNATOR
  -C1
  +C2
   FOOTPRINT
   unknown
   PARTTYPE
  -POLARIZED_CAPACITOR
  +0.1uF
   DESCRIPTION
   POLARIZED_CAPACITOR
   Part Field 1
  @@ -465,13 +465,13 @@
   ]
   [
   DESIGNATOR
  -CONN1
  +C1
   FOOTPRINT
   unknown
   PARTTYPE
  -MAINS_CONNECTOR
  +POLARIZED_CAPACITOR
   DESCRIPTION
  -MAINS_CONNECTOR
  +POLARIZED_CAPACITOR
   Part Field 1
   *
   Part Field 2
  @@ -581,13 +581,13 @@
   ]
   [
   DESIGNATOR
  -F1
  +U2
   FOOTPRINT
   unknown
   PARTTYPE
  -FUSE
  +LM317
   DESCRIPTION
  -FUSE
  +LM317
   Part Field 1
   *
   Part Field 2
  
  
  
  1.2       +22 -22    eda/geda/devel/gnetlist/tests/powersupply.tango
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: powersupply.tango
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/powersupply.tango,v
  retrieving revision 1.1
  retrieving revision 1.2
  diff -u -b -r1.1 -r1.2
  --- powersupply.tango	13 Aug 2002 03:02:53 -0000	1.1
  +++ powersupply.tango	24 Feb 2005 03:55:26 -0000	1.2
  @@ -1,22 +1,29 @@
   [
  -U2
  +F1
   PATTERN
  -LM317
  +FUSE
   
   
   ]
   [
  -C4
  +R2
   PATTERN
  -POLARIZED_CAPACITOR
  -1uf
  +RESISTOR
  +220
   
   ]
   [
  -C3
  +CONN1
  +PATTERN
  +MAINS_CONNECTOR
  +
  +
  +]
  +[
  +C4
   PATTERN
   POLARIZED_CAPACITOR
  -22uF
  +1uf
   
   ]
   [
  @@ -27,24 +34,17 @@
   
   ]
   [
  -C2
  +C3
   PATTERN
   POLARIZED_CAPACITOR
  -0.1uF
  -
  -]
  -[
  -R2
  -PATTERN
  -RESISTOR
  -220
  +22uF
   
   ]
   [
  -C1
  +C2
   PATTERN
   POLARIZED_CAPACITOR
  -
  +0.1uF
   
   ]
   [
  @@ -55,9 +55,9 @@
   
   ]
   [
  -CONN1
  +C1
   PATTERN
  -MAINS_CONNECTOR
  +POLARIZED_CAPACITOR
   
   
   ]
  @@ -69,9 +69,9 @@
   
   ]
   [
  -F1
  +U2
   PATTERN
  -FUSE
  +LM317
   
   
   ]
  
  
  
  1.2       +8 -8      eda/geda/devel/gnetlist/tests/skt.switcap
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: skt.switcap
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/skt.switcap,v
  retrieving revision 1.1
  retrieving revision 1.2
  diff -u -b -r1.1 -r1.2
  --- skt.switcap	27 Apr 2003 23:05:36 -0000	1.1
  +++ skt.switcap	24 Feb 2005 03:55:26 -0000	1.2
  @@ -8,24 +8,24 @@
   TITLE:my title;
   
   TIMING;
  -     PERIOD 1e-6;
        CLOCK CLK1 1 (0 3/8);
  +     PERIOD 1e-6;
   END;
   
   CIRCUIT;
        S7 (5 0) #CLK1;
  -     S8 (6 0) #CLK1;
  +     E1 (OUT 0 0 4) 2.3e5;
        S6 (OUT 6) CLK1;
  +     V1 (0 2);
        S5 (4 5) CLK1;
  -     C3 (5 6) 0.2;
        S4 (3 4) #CLK1;
  -     C2 (4 OUT) 1.0;
  -     C1 (1 3) 1.0;
  -     E1 (OUT 0 0 4) 2.3e5;
        S3 (0 3) CLK1;
  -     S1 (2 1) CLK1;
  -     V1 (0 2);
  +     C3 (5 6) 0.2;
        S2 (0 1) #CLK1;
  +     C2 (4 OUT) 1.0;
  +     S1 (2 1) CLK1;
  +     C1 (1 3) 1.0;
  +     S8 (6 0) #CLK1;
   END;
   
   /* reading analysis from "test.ana" */ 
  
  
  
  1.5       +2 -2      eda/geda/devel/gnetlist/tests/stack.geda
  
  (In the diff below, changes in quantity of whitespace are not shown.)
  
  Index: stack.geda
  ===================================================================
  RCS file: /home/cvspsrv/cvsroot/eda/geda/devel/gnetlist/tests/stack.geda,v
  retrieving revision 1.4
  retrieving revision 1.5
  diff -u -b -r1.4 -r1.5
  --- stack.geda	31 Aug 2003 23:20:09 -0000	1.4
  +++ stack.geda	24 Feb 2005 03:55:26 -0000	1.5
  @@ -7,10 +7,10 @@
   
   START components
   
  -U210 device=74541
   U211 device=74191
  -U212 device=74191
  +U210 device=74541
   U109 device=AM9128
  +U212 device=74191
   
   END components