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gEDA-cvs: branch: master updated (cc6a558339ddc45a9a4ee52e04c37afddcd7d701)



The branch, master has been updated
       via  cc6a558339ddc45a9a4ee52e04c37afddcd7d701 (commit)
      from  bdd22af14068719b4812d80042ebea4c43757a70 (commit)

Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.


=========
 Summary
=========

 images/bitmaps/application-x-pcb-layout-22.png |  Bin 0 -> 887 bytes
 images/bitmaps/document.bmp                    |  Bin 0 -> 822 bytes
 images/bitmaps/geda-gattrib22.png              |  Bin 0 -> 850 bytes
 images/bitmaps/geda-gschem22.png               |  Bin 0 -> 1056 bytes
 images/bitmaps/gerbv-icon26.png                |  Bin 0 -> 1050 bytes
 images/bitmaps/gq-folder.png                   |  Bin 0 -> 674 bytes
 images/bitmaps/image.png                       |  Bin 0 -> 516 bytes
 images/bitmaps/money.png                       |  Bin 0 -> 738 bytes
 images/bitmaps/money_add.png                   |  Bin 0 -> 784 bytes
 images/bitmaps/page_white.png                  |  Bin 0 -> 294 bytes
 images/bitmaps/page_white_error.png            |  Bin 0 -> 623 bytes
 images/bitmaps/pcb22.png                       |  Bin 0 -> 1019 bytes
 images/bitmaps/plot_singleplot.png             |  Bin 0 -> 267 bytes
 images/bitmaps/pn-project.bmp                  |  Bin 0 -> 822 bytes
 images/bitmaps/schematic-module.bmp            |  Bin 0 -> 822 bytes
 images/bitmaps/verilog-module.bmp              |  Bin 0 -> 822 bytes
 images/bitmaps/verilog-test-fixture.bmp        |  Bin 0 -> 822 bytes
 images/bitmaps/vhdl-module.bmp                 |  Bin 0 -> 822 bytes
 18 files changed, 0 insertions(+), 0 deletions(-)
 create mode 100644 images/bitmaps/application-x-pcb-layout-22.png
 create mode 100644 images/bitmaps/document.bmp
 create mode 100644 images/bitmaps/geda-gattrib22.png
 create mode 100644 images/bitmaps/geda-gschem22.png
 create mode 100644 images/bitmaps/gerbv-icon26.png
 create mode 100644 images/bitmaps/gq-folder.png
 create mode 100644 images/bitmaps/image.png
 create mode 100644 images/bitmaps/money.png
 create mode 100644 images/bitmaps/money_add.png
 create mode 100644 images/bitmaps/page_white.png
 create mode 100644 images/bitmaps/page_white_error.png
 create mode 100644 images/bitmaps/pcb22.png
 create mode 100644 images/bitmaps/plot_singleplot.png
 create mode 100644 images/bitmaps/pn-project.bmp
 create mode 100644 images/bitmaps/schematic-module.bmp
 create mode 100644 images/bitmaps/verilog-module.bmp
 create mode 100644 images/bitmaps/verilog-test-fixture.bmp
 create mode 100644 images/bitmaps/vhdl-module.bmp


=================
 Commit Messages
=================

commit cc6a558339ddc45a9a4ee52e04c37afddcd7d701
Author: Newell Jensen <jensen@xxxxxxxxxxxxxxx>
Date:   Mon Jul 14 01:13:53 2008 -0700

    Adding only the images that are needed at the moment.  Still need to figure
    out what images I will be using for the files in the Utils.icon_lut object that
    do not currently have an icon.

:000000 100644 0000000... 024943f... A	images/bitmaps/application-x-pcb-layout-22.png
:000000 100644 0000000... 873f2d9... A	images/bitmaps/document.bmp
:000000 100644 0000000... 03b76b2... A	images/bitmaps/geda-gattrib22.png
:000000 100644 0000000... 43eac7b... A	images/bitmaps/geda-gschem22.png
:000000 100644 0000000... 4c8220d... A	images/bitmaps/gerbv-icon26.png
:000000 100644 0000000... 43dc700... A	images/bitmaps/gq-folder.png
:000000 100644 0000000... fc3c393... A	images/bitmaps/image.png
:000000 100644 0000000... 42c52d0... A	images/bitmaps/money.png
:000000 100644 0000000... 588fa9d... A	images/bitmaps/money_add.png
:000000 100644 0000000... 8b8b1ca... A	images/bitmaps/page_white.png
:000000 100644 0000000... 9fc5a0a... A	images/bitmaps/page_white_error.png
:000000 100644 0000000... 9628a1e... A	images/bitmaps/pcb22.png
:000000 100644 0000000... 446abc9... A	images/bitmaps/plot_singleplot.png
:000000 100644 0000000... 2628b04... A	images/bitmaps/pn-project.bmp
:000000 100644 0000000... d252885... A	images/bitmaps/schematic-module.bmp
:000000 100644 0000000... 5f9edac... A	images/bitmaps/verilog-module.bmp
:000000 100644 0000000... 7f3c49d... A	images/bitmaps/verilog-test-fixture.bmp
:000000 100644 0000000... 66d210e... A	images/bitmaps/vhdl-module.bmp

=========
 Changes
=========

commit cc6a558339ddc45a9a4ee52e04c37afddcd7d701
Author: Newell Jensen <jensen@xxxxxxxxxxxxxxx>
Date:   Mon Jul 14 01:13:53 2008 -0700

    Adding only the images that are needed at the moment.  Still need to figure
    out what images I will be using for the files in the Utils.icon_lut object that
    do not currently have an icon.

diff --git a/images/bitmaps/application-x-pcb-layout-22.png b/images/bitmaps/application-x-pcb-layout-22.png
new file mode 100644
index 0000000..024943f
Binary files /dev/null and b/images/bitmaps/application-x-pcb-layout-22.png differ
diff --git a/images/bitmaps/document.bmp b/images/bitmaps/document.bmp
new file mode 100644
index 0000000..873f2d9
Binary files /dev/null and b/images/bitmaps/document.bmp differ
diff --git a/images/bitmaps/geda-gattrib22.png b/images/bitmaps/geda-gattrib22.png
new file mode 100644
index 0000000..03b76b2
Binary files /dev/null and b/images/bitmaps/geda-gattrib22.png differ
diff --git a/images/bitmaps/geda-gschem22.png b/images/bitmaps/geda-gschem22.png
new file mode 100644
index 0000000..43eac7b
Binary files /dev/null and b/images/bitmaps/geda-gschem22.png differ
diff --git a/images/bitmaps/gerbv-icon26.png b/images/bitmaps/gerbv-icon26.png
new file mode 100644
index 0000000..4c8220d
Binary files /dev/null and b/images/bitmaps/gerbv-icon26.png differ
diff --git a/images/bitmaps/gq-folder.png b/images/bitmaps/gq-folder.png
new file mode 100644
index 0000000..43dc700
Binary files /dev/null and b/images/bitmaps/gq-folder.png differ
diff --git a/images/bitmaps/image.png b/images/bitmaps/image.png
new file mode 100644
index 0000000..fc3c393
Binary files /dev/null and b/images/bitmaps/image.png differ
diff --git a/images/bitmaps/money.png b/images/bitmaps/money.png
new file mode 100644
index 0000000..42c52d0
Binary files /dev/null and b/images/bitmaps/money.png differ
diff --git a/images/bitmaps/money_add.png b/images/bitmaps/money_add.png
new file mode 100644
index 0000000..588fa9d
Binary files /dev/null and b/images/bitmaps/money_add.png differ
diff --git a/images/bitmaps/page_white.png b/images/bitmaps/page_white.png
new file mode 100644
index 0000000..8b8b1ca
Binary files /dev/null and b/images/bitmaps/page_white.png differ
diff --git a/images/bitmaps/page_white_error.png b/images/bitmaps/page_white_error.png
new file mode 100644
index 0000000..9fc5a0a
Binary files /dev/null and b/images/bitmaps/page_white_error.png differ
diff --git a/images/bitmaps/pcb22.png b/images/bitmaps/pcb22.png
new file mode 100644
index 0000000..9628a1e
Binary files /dev/null and b/images/bitmaps/pcb22.png differ
diff --git a/images/bitmaps/plot_singleplot.png b/images/bitmaps/plot_singleplot.png
new file mode 100644
index 0000000..446abc9
Binary files /dev/null and b/images/bitmaps/plot_singleplot.png differ
diff --git a/images/bitmaps/pn-project.bmp b/images/bitmaps/pn-project.bmp
new file mode 100644
index 0000000..2628b04
Binary files /dev/null and b/images/bitmaps/pn-project.bmp differ
diff --git a/images/bitmaps/schematic-module.bmp b/images/bitmaps/schematic-module.bmp
new file mode 100644
index 0000000..d252885
Binary files /dev/null and b/images/bitmaps/schematic-module.bmp differ
diff --git a/images/bitmaps/verilog-module.bmp b/images/bitmaps/verilog-module.bmp
new file mode 100644
index 0000000..5f9edac
Binary files /dev/null and b/images/bitmaps/verilog-module.bmp differ
diff --git a/images/bitmaps/verilog-test-fixture.bmp b/images/bitmaps/verilog-test-fixture.bmp
new file mode 100644
index 0000000..7f3c49d
Binary files /dev/null and b/images/bitmaps/verilog-test-fixture.bmp differ
diff --git a/images/bitmaps/vhdl-module.bmp b/images/bitmaps/vhdl-module.bmp
new file mode 100644
index 0000000..66d210e
Binary files /dev/null and b/images/bitmaps/vhdl-module.bmp differ




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