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gEDA-cvs: pcb.git: branch: master updated (c563086581240c5a569de5e68b9f7e9fdcf1ddd3)
The branch, master has been updated
via c563086581240c5a569de5e68b9f7e9fdcf1ddd3 (commit)
via 81fdd6f7753046121b268cc562faab2d4bcb69f6 (commit)
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via a3a7e8f0e2e4b5fec29d807eaf635fa7366105c8 (commit)
via 56edd54453be28846854b45b73c41c7f66965855 (commit)
via 69ae9955ac31e72df70338e1fd30414ea2ff2719 (commit)
via 7968eb05393b54af0b2f3a52e0f4c8dc27657fbb (commit)
via 8039b7114c038b05688f0e7c2a527a187cda242e (commit)
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=========
Summary
=========
configure.ac | 64 +-
doc/pcb.texi | 84 +-
src/buffer.c | 17 +-
src/pcbtest.sh.in | 41 +-
tests/Makefile.am | 28 +
tests/README.txt | 72 +
tests/golden/Makefile.am | 10 +
tests/golden/hid_bom1/Makefile.am | 6 +
tests/golden/hid_bom1/bom_general.bom | 10 +
tests/golden/hid_bom1/bom_general.xy | 32 +
tests/golden/hid_bom2/Makefile.am | 5 +
tests/golden/hid_bom2/bom_general.xy | 32 +
tests/golden/hid_bom2/test.bom | 10 +
tests/golden/hid_bom3/Makefile.am | 5 +
tests/golden/hid_bom3/bom_general.bom | 10 +
tests/golden/hid_bom3/test.xy | 32 +
tests/golden/hid_bom4/Makefile.am | 5 +
tests/golden/hid_bom4/bom_general.bom | 10 +
tests/golden/hid_bom4/bom_general.xy | 32 +
tests/golden/hid_gerber1/Makefile.am | 7 +
tests/golden/hid_gerber1/gerber_oneline.back.gbr | 17 +
tests/golden/hid_gerber1/gerber_oneline.fab.gbr | 1734 +++++++++++++++++++
tests/golden/hid_gerber1/gerber_oneline.front.gbr | 17 +
.../hid_gerber1/gerber_oneline.plated-drill.cnc | 7 +
tests/golden/hid_gerber2/Makefile.am | 7 +
tests/golden/hid_gerber2/out.back.gbr | 17 +
tests/golden/hid_gerber2/out.fab.gbr | 1754 ++++++++++++++++++++
tests/golden/hid_gerber2/out.front.gbr | 17 +
tests/golden/hid_gerber2/out.plated-drill.cnc | 7 +
tests/inputs/Makefile.am | 6 +
tests/inputs/bom_general.pcb | 1214 ++++++++++++++
.../inputs/gerber_oneline.pcb | 26 +-
tests/run_tests.sh | 602 +++++++
tests/tests.list | 108 ++
34 files changed, 6015 insertions(+), 30 deletions(-)
create mode 100644 tests/Makefile.am
create mode 100644 tests/README.txt
create mode 100644 tests/golden/Makefile.am
create mode 100644 tests/golden/hid_bom1/Makefile.am
create mode 100644 tests/golden/hid_bom1/bom_general.bom
create mode 100644 tests/golden/hid_bom1/bom_general.xy
create mode 100644 tests/golden/hid_bom2/Makefile.am
create mode 100644 tests/golden/hid_bom2/bom_general.xy
create mode 100644 tests/golden/hid_bom2/test.bom
create mode 100644 tests/golden/hid_bom3/Makefile.am
create mode 100644 tests/golden/hid_bom3/bom_general.bom
create mode 100644 tests/golden/hid_bom3/test.xy
create mode 100644 tests/golden/hid_bom4/Makefile.am
create mode 100644 tests/golden/hid_bom4/bom_general.bom
create mode 100644 tests/golden/hid_bom4/bom_general.xy
create mode 100644 tests/golden/hid_gerber1/Makefile.am
create mode 100644 tests/golden/hid_gerber1/gerber_oneline.back.gbr
create mode 100644 tests/golden/hid_gerber1/gerber_oneline.fab.gbr
create mode 100644 tests/golden/hid_gerber1/gerber_oneline.front.gbr
create mode 100644 tests/golden/hid_gerber1/gerber_oneline.plated-drill.cnc
create mode 100644 tests/golden/hid_gerber2/Makefile.am
create mode 100644 tests/golden/hid_gerber2/out.back.gbr
create mode 100644 tests/golden/hid_gerber2/out.fab.gbr
create mode 100644 tests/golden/hid_gerber2/out.front.gbr
create mode 100644 tests/golden/hid_gerber2/out.plated-drill.cnc
create mode 100644 tests/inputs/Makefile.am
create mode 100644 tests/inputs/bom_general.pcb
copy doc/gs/term-thermal-1.pcb => tests/inputs/gerber_oneline.pcb (96%)
create mode 100755 tests/run_tests.sh
create mode 100644 tests/tests.list
=================
Commit Messages
=================
commit 81fdd6f7753046121b268cc562faab2d4bcb69f6
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
Add the start of a testsuite.
Add a testsuite framework. Currently it is capable of doing tests on
the gerber and bom export HID's. It should be fairly easy to add png
and nelma export HID's to the testsuite. The coverage is limited right
now but it should be simple to add additional tests now that the framework
is in place.
:000000 100644 0000000... ca3fd19... A tests/Makefile.am
:000000 100644 0000000... dd7750f... A tests/README.txt
:000000 100644 0000000... 54de48d... A tests/golden/Makefile.am
:000000 100644 0000000... 496b3f3... A tests/golden/hid_bom1/Makefile.am
:000000 100644 0000000... e069ea1... A tests/golden/hid_bom1/bom_general.bom
:000000 100644 0000000... dfcd7de... A tests/golden/hid_bom1/bom_general.xy
:000000 100644 0000000... 9abeff1... A tests/golden/hid_bom2/Makefile.am
:000000 100644 0000000... c2c9ea2... A tests/golden/hid_bom2/bom_general.xy
:000000 100644 0000000... c2677f5... A tests/golden/hid_bom2/test.bom
:000000 100644 0000000... 08213d3... A tests/golden/hid_bom3/Makefile.am
:000000 100644 0000000... c2677f5... A tests/golden/hid_bom3/bom_general.bom
:000000 100644 0000000... c2c9ea2... A tests/golden/hid_bom3/test.xy
:000000 100644 0000000... 9f185cd... A tests/golden/hid_bom4/Makefile.am
:000000 100644 0000000... bb246f5... A tests/golden/hid_bom4/bom_general.bom
:000000 100644 0000000... fb1350e... A tests/golden/hid_bom4/bom_general.xy
:000000 100644 0000000... 9d32ff3... A tests/golden/hid_gerber1/Makefile.am
:000000 100644 0000000... b5b70e8... A tests/golden/hid_gerber1/gerber_oneline.back.gbr
:000000 100644 0000000... a20714d... A tests/golden/hid_gerber1/gerber_oneline.fab.gbr
:000000 100644 0000000... c24a8fe... A tests/golden/hid_gerber1/gerber_oneline.front.gbr
:000000 100644 0000000... 5456a91... A tests/golden/hid_gerber1/gerber_oneline.plated-drill.cnc
:000000 100644 0000000... e07c8b4... A tests/golden/hid_gerber2/Makefile.am
:000000 100644 0000000... 5e9aa06... A tests/golden/hid_gerber2/out.back.gbr
:000000 100644 0000000... f1629a4... A tests/golden/hid_gerber2/out.fab.gbr
:000000 100644 0000000... 37f79a8... A tests/golden/hid_gerber2/out.front.gbr
:000000 100644 0000000... 5456a91... A tests/golden/hid_gerber2/out.plated-drill.cnc
:000000 100644 0000000... b7dbb1e... A tests/inputs/Makefile.am
:000000 100644 0000000... d61b301... A tests/inputs/bom_general.pcb
:000000 100644 0000000... c20eacf... A tests/inputs/gerber_oneline.pcb
:000000 100755 0000000... fd96f11... A tests/run_tests.sh
:000000 100644 0000000... d4ca7fd... A tests/tests.list
commit 0f84a6a5b0d0990b14cc0eec89c8e837ab1ecad7
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
Document the FreeRotateBuffer() action.
Add syntax and help strings as well as the manual documentation
for the FreeRotateBuffer() action.
:100644 100644 8acbfce... a39e7cd... M src/buffer.c
commit a3a7e8f0e2e4b5fec29d807eaf635fa7366105c8
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
Add a comment about breakouts for fine pitch power pins and the autorouter.
Add a comment about breakouts for fine pitch power pins and the autorouter.
Suggested by harry on geda-user.
:100644 100644 ad53c4c... f9f0503... M doc/pcb.texi
commit 56edd54453be28846854b45b73c41c7f66965855
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
Add a short chapter on using the autorouter.
Add a short chapter on using the autorouter based on email
instructions from harry on geda-user.
:100644 100644 634134d... ad53c4c... M doc/pcb.texi
commit 69ae9955ac31e72df70338e1fd30414ea2ff2719
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
Improve the pre-install pcb wrapper script.
The pcbtest.sh wrapper script is used to run pcb for testing
before pcb is installed. Improve the robustness of this script
to allow it to be run from a different directory from where it
is created as well as allowing the export HID's to be called
with it.
:100755 100755 c7dfe8d... e1e97b2... M src/pcbtest.sh.in
commit 8039b7114c038b05688f0e7c2a527a187cda242e
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
add some checks for tools that will be useful for a testsuite.
Currently nothing happens if they are not found except for a message
about them not being found.
:100644 100644 a19a0fd... 529728b... M configure.ac
=========
Changes
=========
commit 81fdd6f7753046121b268cc562faab2d4bcb69f6
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
Add the start of a testsuite.
Add a testsuite framework. Currently it is capable of doing tests on
the gerber and bom export HID's. It should be fairly easy to add png
and nelma export HID's to the testsuite. The coverage is limited right
now but it should be simple to add additional tests now that the framework
is in place.
diff --git a/tests/Makefile.am b/tests/Makefile.am
new file mode 100644
index 0000000..ca3fd19
--- /dev/null
+++ b/tests/Makefile.am
@@ -0,0 +1,28 @@
+## -*- makefile -*-
+
+SUBDIRS= golden inputs
+
+TESTS_ENVIRONMENT= \
+ GERBV=${GERBV} \
+ IM_ANIMATE=${IM_ANIMATE} \
+ IM_COMPARE=${IM_COMPARE} \
+ IM_COMPOSITE=${IM_COMPOSITE} \
+ IM_CONVERT=${IM_CONVERT} \
+ IM_DISPLAY=${IM_DISPLAY} \
+ IM_MONTAGE=${IM_MONTAGE}
+
+RUN_TESTS= run_tests.sh
+
+check_SCRIPTS= ${RUN_TESTS}
+
+# if we have the required tools, then run the regression test
+if HAVE_TEST_TOOLS
+TESTS= ${RUN_TESTS}
+endif
+
+EXTRA_DIST= ${RUN_TESTS} tests.list README.txt
+
+# these are created by 'make check'
+clean-local:
+ rm -rf outputs
+
diff --git a/tests/README.txt b/tests/README.txt
new file mode 100644
index 0000000..dd7750f
--- /dev/null
+++ b/tests/README.txt
@@ -0,0 +1,72 @@
+FIXME -- this is not really updated yet. It is more or less verbatim
+from gerbv and needs updating for pcb.
+
+Please read this file before making any modifications to the test suite.
+
+
+
+**********************************************************************
+**********************************************************************
+* Updating existing "golden" files
+**********************************************************************
+**********************************************************************
+
+./run_tests.sh --regen <testname>
+
+will regenerate the golden file for <testname>. I suggest saving
+off a copy and using ImageMagick to look for the differences visually.
+The run_tests.sh script has examples of comparing .png files. Make
+sure the changes are only the expected ones and then check the new
+files back into cvs. Do not blindly update these files as that defeats
+the purpose of the tests.
+
+**********************************************************************
+**********************************************************************
+* Adding New Tests
+**********************************************************************
+**********************************************************************
+
+----------------------------------------------------------------------
+Create input files
+----------------------------------------------------------------------
+
+Create a *small* layout input file and put it in the inputs/
+directory. The goal is to have a file which tests one particular aspect
+of the capabilities of pcb.
+
+----------------------------------------------------------------------
+Add to tests.list
+----------------------------------------------------------------------
+
+Add an entry to the tests.list file for your new tests. Use existing
+entries as an example.
+
+----------------------------------------------------------------------
+Generate the reference files
+----------------------------------------------------------------------
+
+Generate the reference files for your new tests using the following
+
+./run_tests.sh --regen <new_test_name>
+
+where <new_test_name> is the name of your new test from tests.list. If you
+are adding multiple tests, then you can list them all on the same
+command line.
+
+*IMPORTANT*
+Verify that the generated .png files for your new tests are correct. These
+files will have been placed in the golden/ subdirectory.
+
+----------------------------------------------------------------------
+Update Makefile.am's
+----------------------------------------------------------------------
+
+Update inputs/Makefile.am and golden/Makefile.am to include your new
+files.
+
+----------------------------------------------------------------------
+Add the new files to git
+----------------------------------------------------------------------
+
+FIXME -- fill in this section
+
diff --git a/tests/golden/Makefile.am b/tests/golden/Makefile.am
new file mode 100644
index 0000000..54de48d
--- /dev/null
+++ b/tests/golden/Makefile.am
@@ -0,0 +1,10 @@
+## -*- makefile -*-
+
+SUBDIRS= \
+ hid_bom1 \
+ hid_bom2 \
+ hid_bom3 \
+ hid_bom4 \
+ hid_gerber1 \
+ hid_gerber2
+
diff --git a/tests/golden/hid_bom1/Makefile.am b/tests/golden/hid_bom1/Makefile.am
new file mode 100644
index 0000000..496b3f3
--- /dev/null
+++ b/tests/golden/hid_bom1/Makefile.am
@@ -0,0 +1,6 @@
+## -*- makefile -*-
+
+EXTRA_DIST= \
+ bom_general.bom \
+ bom_general.xy
+
diff --git a/tests/golden/hid_bom1/bom_general.bom b/tests/golden/hid_bom1/bom_general.bom
new file mode 100644
index 0000000..e069ea1
--- /dev/null
+++ b/tests/golden/hid_bom1/bom_general.bom
@@ -0,0 +1,10 @@
+# $Id$
+# PcbBOM Version 1.0
+# Date: Wed Jun 24 21:42:21 2009 UTC
+# Author: Dan McMahill
+# Title: Basic BOM/XY Test - PCB BOM
+# Quantity, Description, Value, RefDes
+# --------------------------------------------
+8,"Standard SMT resistor, capacitor etc","RESC3216N",R90_TOP R180_TOP R270_TOP R0_TOP R270_BOT R180_BOT R90_BOT R0_BOT
+8,"Dual in-line package, narrow (300 mil)","DIP8",UDIP90_TOP UDIP180_TOP UDIP270_TOP UDIP0_TOP UDIP270_BOT UDIP180_BOT UDIP90_BOT UDIP0_BOT
+8,"Small outline package, narrow (150mil)","SO8",USO90_TOP USO180_TOP USO270_TOP USO0_TOP USO270_BOT USO180_BOT USO90_BOT USO0_BOT
diff --git a/tests/golden/hid_bom1/bom_general.xy b/tests/golden/hid_bom1/bom_general.xy
new file mode 100644
index 0000000..dfcd7de
--- /dev/null
+++ b/tests/golden/hid_bom1/bom_general.xy
@@ -0,0 +1,32 @@
+# $Id$
+# PcbXY Version 1.0
+# Date: Wed Jun 24 21:42:21 2009 UTC
+# Author: Dan McMahill
+# Title: Basic BOM/XY Test - PCB X-Y
+# RefDes, Description, Value, X, Y, rotation, top/bottom
+# X,Y in mils. rotation in degrees.
+# --------------------------------------------
+R90_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",1700.00,4300.00,90,top
+R180_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",1300.00,4300.00,180,top
+R270_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",1000.00,4300.00,270,top
+R0_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",600.00,4300.00,0,top
+UDIP90_TOP,"Dual in-line package, narrow (300 mil)","DIP8",2650.00,1450.00,180,top
+UDIP180_TOP,"Dual in-line package, narrow (300 mil)","DIP8",1950.00,1450.00,270,top
+UDIP270_TOP,"Dual in-line package, narrow (300 mil)","DIP8",1250.00,1450.00,0,top
+UDIP0_TOP,"Dual in-line package, narrow (300 mil)","DIP8",550.00,1450.00,90,top
+USO90_TOP,"Small outline package, narrow (150mil)","SO8",1700.00,3200.00,180,top
+USO180_TOP,"Small outline package, narrow (150mil)","SO8",1300.00,3200.00,270,top
+USO270_TOP,"Small outline package, narrow (150mil)","SO8",1000.00,3200.00,0,top
+USO0_TOP,"Small outline package, narrow (150mil)","SO8",600.00,3200.00,90,top
+UDIP270_BOT,"Dual in-line package, narrow (300 mil)","DIP8",2650.00,650.00,270,bottom
+UDIP180_BOT,"Dual in-line package, narrow (300 mil)","DIP8",1950.00,650.00,180,bottom
+UDIP90_BOT,"Dual in-line package, narrow (300 mil)","DIP8",1250.00,650.00,90,bottom
+UDIP0_BOT,"Dual in-line package, narrow (300 mil)","DIP8",550.00,650.00,0,bottom
+USO270_BOT,"Small outline package, narrow (150mil)","SO8",1700.00,2600.00,270,bottom
+USO180_BOT,"Small outline package, narrow (150mil)","SO8",1300.00,2600.00,180,bottom
+USO90_BOT,"Small outline package, narrow (150mil)","SO8",1000.00,2600.00,90,bottom
+USO0_BOT,"Small outline package, narrow (150mil)","SO8",600.00,2600.00,0,bottom
+R270_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",1700.00,3900.00,270,bottom
+R180_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",1300.00,3900.00,180,bottom
+R90_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",1000.00,3900.00,90,bottom
+R0_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",600.00,3900.00,0,bottom
diff --git a/tests/golden/hid_bom2/Makefile.am b/tests/golden/hid_bom2/Makefile.am
new file mode 100644
index 0000000..9abeff1
--- /dev/null
+++ b/tests/golden/hid_bom2/Makefile.am
@@ -0,0 +1,5 @@
+## -*- makefile -*-
+
+EXTRA_DIST= \
+ bom_general.xy \
+ test.bom
diff --git a/tests/golden/hid_bom2/bom_general.xy b/tests/golden/hid_bom2/bom_general.xy
new file mode 100644
index 0000000..c2c9ea2
--- /dev/null
+++ b/tests/golden/hid_bom2/bom_general.xy
@@ -0,0 +1,32 @@
+# $Id$
+# PcbXY Version 1.0
+# Date: Wed Jun 24 21:42:22 2009 UTC
+# Author: Dan McMahill
+# Title: Basic BOM/XY Test - PCB X-Y
+# RefDes, Description, Value, X, Y, rotation, top/bottom
+# X,Y in mils. rotation in degrees.
+# --------------------------------------------
+R90_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",1700.00,4300.00,90,top
+R180_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",1300.00,4300.00,180,top
+R270_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",1000.00,4300.00,270,top
+R0_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",600.00,4300.00,0,top
+UDIP90_TOP,"Dual in-line package, narrow (300 mil)","DIP8",2650.00,1450.00,180,top
+UDIP180_TOP,"Dual in-line package, narrow (300 mil)","DIP8",1950.00,1450.00,270,top
+UDIP270_TOP,"Dual in-line package, narrow (300 mil)","DIP8",1250.00,1450.00,0,top
+UDIP0_TOP,"Dual in-line package, narrow (300 mil)","DIP8",550.00,1450.00,90,top
+USO90_TOP,"Small outline package, narrow (150mil)","SO8",1700.00,3200.00,180,top
+USO180_TOP,"Small outline package, narrow (150mil)","SO8",1300.00,3200.00,270,top
+USO270_TOP,"Small outline package, narrow (150mil)","SO8",1000.00,3200.00,0,top
+USO0_TOP,"Small outline package, narrow (150mil)","SO8",600.00,3200.00,90,top
+UDIP270_BOT,"Dual in-line package, narrow (300 mil)","DIP8",2650.00,650.00,270,bottom
+UDIP180_BOT,"Dual in-line package, narrow (300 mil)","DIP8",1950.00,650.00,180,bottom
+UDIP90_BOT,"Dual in-line package, narrow (300 mil)","DIP8",1250.00,650.00,90,bottom
+UDIP0_BOT,"Dual in-line package, narrow (300 mil)","DIP8",550.00,650.00,0,bottom
+USO270_BOT,"Small outline package, narrow (150mil)","SO8",1700.00,2600.00,270,bottom
+USO180_BOT,"Small outline package, narrow (150mil)","SO8",1300.00,2600.00,180,bottom
+USO90_BOT,"Small outline package, narrow (150mil)","SO8",1000.00,2600.00,90,bottom
+USO0_BOT,"Small outline package, narrow (150mil)","SO8",600.00,2600.00,0,bottom
+R270_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",1700.00,3900.00,270,bottom
+R180_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",1300.00,3900.00,180,bottom
+R90_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",1000.00,3900.00,90,bottom
+R0_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",600.00,3900.00,0,bottom
diff --git a/tests/golden/hid_bom2/test.bom b/tests/golden/hid_bom2/test.bom
new file mode 100644
index 0000000..c2677f5
--- /dev/null
+++ b/tests/golden/hid_bom2/test.bom
@@ -0,0 +1,10 @@
+# $Id$
+# PcbBOM Version 1.0
+# Date: Wed Jun 24 21:42:22 2009 UTC
+# Author: Dan McMahill
+# Title: Basic BOM/XY Test - PCB BOM
+# Quantity, Description, Value, RefDes
+# --------------------------------------------
+8,"Standard SMT resistor, capacitor etc","RESC3216N",R90_TOP R180_TOP R270_TOP R0_TOP R270_BOT R180_BOT R90_BOT R0_BOT
+8,"Dual in-line package, narrow (300 mil)","DIP8",UDIP90_TOP UDIP180_TOP UDIP270_TOP UDIP0_TOP UDIP270_BOT UDIP180_BOT UDIP90_BOT UDIP0_BOT
+8,"Small outline package, narrow (150mil)","SO8",USO90_TOP USO180_TOP USO270_TOP USO0_TOP USO270_BOT USO180_BOT USO90_BOT USO0_BOT
diff --git a/tests/golden/hid_bom3/Makefile.am b/tests/golden/hid_bom3/Makefile.am
new file mode 100644
index 0000000..08213d3
--- /dev/null
+++ b/tests/golden/hid_bom3/Makefile.am
@@ -0,0 +1,5 @@
+## -*- makefile -*-
+
+EXTRA_DIST= \
+ bom_general.bom \
+ test.xy
diff --git a/tests/golden/hid_bom3/bom_general.bom b/tests/golden/hid_bom3/bom_general.bom
new file mode 100644
index 0000000..c2677f5
--- /dev/null
+++ b/tests/golden/hid_bom3/bom_general.bom
@@ -0,0 +1,10 @@
+# $Id$
+# PcbBOM Version 1.0
+# Date: Wed Jun 24 21:42:22 2009 UTC
+# Author: Dan McMahill
+# Title: Basic BOM/XY Test - PCB BOM
+# Quantity, Description, Value, RefDes
+# --------------------------------------------
+8,"Standard SMT resistor, capacitor etc","RESC3216N",R90_TOP R180_TOP R270_TOP R0_TOP R270_BOT R180_BOT R90_BOT R0_BOT
+8,"Dual in-line package, narrow (300 mil)","DIP8",UDIP90_TOP UDIP180_TOP UDIP270_TOP UDIP0_TOP UDIP270_BOT UDIP180_BOT UDIP90_BOT UDIP0_BOT
+8,"Small outline package, narrow (150mil)","SO8",USO90_TOP USO180_TOP USO270_TOP USO0_TOP USO270_BOT USO180_BOT USO90_BOT USO0_BOT
diff --git a/tests/golden/hid_bom3/test.xy b/tests/golden/hid_bom3/test.xy
new file mode 100644
index 0000000..c2c9ea2
--- /dev/null
+++ b/tests/golden/hid_bom3/test.xy
@@ -0,0 +1,32 @@
+# $Id$
+# PcbXY Version 1.0
+# Date: Wed Jun 24 21:42:22 2009 UTC
+# Author: Dan McMahill
+# Title: Basic BOM/XY Test - PCB X-Y
+# RefDes, Description, Value, X, Y, rotation, top/bottom
+# X,Y in mils. rotation in degrees.
+# --------------------------------------------
+R90_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",1700.00,4300.00,90,top
+R180_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",1300.00,4300.00,180,top
+R270_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",1000.00,4300.00,270,top
+R0_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",600.00,4300.00,0,top
+UDIP90_TOP,"Dual in-line package, narrow (300 mil)","DIP8",2650.00,1450.00,180,top
+UDIP180_TOP,"Dual in-line package, narrow (300 mil)","DIP8",1950.00,1450.00,270,top
+UDIP270_TOP,"Dual in-line package, narrow (300 mil)","DIP8",1250.00,1450.00,0,top
+UDIP0_TOP,"Dual in-line package, narrow (300 mil)","DIP8",550.00,1450.00,90,top
+USO90_TOP,"Small outline package, narrow (150mil)","SO8",1700.00,3200.00,180,top
+USO180_TOP,"Small outline package, narrow (150mil)","SO8",1300.00,3200.00,270,top
+USO270_TOP,"Small outline package, narrow (150mil)","SO8",1000.00,3200.00,0,top
+USO0_TOP,"Small outline package, narrow (150mil)","SO8",600.00,3200.00,90,top
+UDIP270_BOT,"Dual in-line package, narrow (300 mil)","DIP8",2650.00,650.00,270,bottom
+UDIP180_BOT,"Dual in-line package, narrow (300 mil)","DIP8",1950.00,650.00,180,bottom
+UDIP90_BOT,"Dual in-line package, narrow (300 mil)","DIP8",1250.00,650.00,90,bottom
+UDIP0_BOT,"Dual in-line package, narrow (300 mil)","DIP8",550.00,650.00,0,bottom
+USO270_BOT,"Small outline package, narrow (150mil)","SO8",1700.00,2600.00,270,bottom
+USO180_BOT,"Small outline package, narrow (150mil)","SO8",1300.00,2600.00,180,bottom
+USO90_BOT,"Small outline package, narrow (150mil)","SO8",1000.00,2600.00,90,bottom
+USO0_BOT,"Small outline package, narrow (150mil)","SO8",600.00,2600.00,0,bottom
+R270_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",1700.00,3900.00,270,bottom
+R180_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",1300.00,3900.00,180,bottom
+R90_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",1000.00,3900.00,90,bottom
+R0_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",600.00,3900.00,0,bottom
diff --git a/tests/golden/hid_bom4/Makefile.am b/tests/golden/hid_bom4/Makefile.am
new file mode 100644
index 0000000..9f185cd
--- /dev/null
+++ b/tests/golden/hid_bom4/Makefile.am
@@ -0,0 +1,5 @@
+## -*- makefile -*-
+
+EXTRA_DIST= \
+ bom_general.bom \
+ bom_general.xy
diff --git a/tests/golden/hid_bom4/bom_general.bom b/tests/golden/hid_bom4/bom_general.bom
new file mode 100644
index 0000000..bb246f5
--- /dev/null
+++ b/tests/golden/hid_bom4/bom_general.bom
@@ -0,0 +1,10 @@
+# $Id$
+# PcbBOM Version 1.0
+# Date: Wed Jun 24 21:42:23 2009 UTC
+# Author: Dan McMahill
+# Title: Basic BOM/XY Test - PCB BOM
+# Quantity, Description, Value, RefDes
+# --------------------------------------------
+8,"Standard SMT resistor, capacitor etc","RESC3216N",R90_TOP R180_TOP R270_TOP R0_TOP R270_BOT R180_BOT R90_BOT R0_BOT
+8,"Dual in-line package, narrow (300 mil)","DIP8",UDIP90_TOP UDIP180_TOP UDIP270_TOP UDIP0_TOP UDIP270_BOT UDIP180_BOT UDIP90_BOT UDIP0_BOT
+8,"Small outline package, narrow (150mil)","SO8",USO90_TOP USO180_TOP USO270_TOP USO0_TOP USO270_BOT USO180_BOT USO90_BOT USO0_BOT
diff --git a/tests/golden/hid_bom4/bom_general.xy b/tests/golden/hid_bom4/bom_general.xy
new file mode 100644
index 0000000..fb1350e
--- /dev/null
+++ b/tests/golden/hid_bom4/bom_general.xy
@@ -0,0 +1,32 @@
+# $Id$
+# PcbXY Version 1.0
+# Date: Wed Jun 24 21:42:23 2009 UTC
+# Author: Dan McMahill
+# Title: Basic BOM/XY Test - PCB X-Y
+# RefDes, Description, Value, X, Y, rotation, top/bottom
+# X,Y in mm. rotation in degrees.
+# --------------------------------------------
+R90_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",43.18,109.22,90,top
+R180_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",33.02,109.22,180,top
+R270_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",25.40,109.22,270,top
+R0_TOP,"Standard SMT resistor, capacitor etc","RESC3216N",15.24,109.22,0,top
+UDIP90_TOP,"Dual in-line package, narrow (300 mil)","DIP8",67.31,36.83,180,top
+UDIP180_TOP,"Dual in-line package, narrow (300 mil)","DIP8",49.53,36.83,270,top
+UDIP270_TOP,"Dual in-line package, narrow (300 mil)","DIP8",31.75,36.83,0,top
+UDIP0_TOP,"Dual in-line package, narrow (300 mil)","DIP8",13.97,36.83,90,top
+USO90_TOP,"Small outline package, narrow (150mil)","SO8",43.18,81.28,180,top
+USO180_TOP,"Small outline package, narrow (150mil)","SO8",33.02,81.28,270,top
+USO270_TOP,"Small outline package, narrow (150mil)","SO8",25.40,81.28,0,top
+USO0_TOP,"Small outline package, narrow (150mil)","SO8",15.24,81.28,90,top
+UDIP270_BOT,"Dual in-line package, narrow (300 mil)","DIP8",67.31,16.51,270,bottom
+UDIP180_BOT,"Dual in-line package, narrow (300 mil)","DIP8",49.53,16.51,180,bottom
+UDIP90_BOT,"Dual in-line package, narrow (300 mil)","DIP8",31.75,16.51,90,bottom
+UDIP0_BOT,"Dual in-line package, narrow (300 mil)","DIP8",13.97,16.51,0,bottom
+USO270_BOT,"Small outline package, narrow (150mil)","SO8",43.18,66.04,270,bottom
+USO180_BOT,"Small outline package, narrow (150mil)","SO8",33.02,66.04,180,bottom
+USO90_BOT,"Small outline package, narrow (150mil)","SO8",25.40,66.04,90,bottom
+USO0_BOT,"Small outline package, narrow (150mil)","SO8",15.24,66.04,0,bottom
+R270_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",43.18,99.06,270,bottom
+R180_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",33.02,99.06,180,bottom
+R90_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",25.40,99.06,90,bottom
+R0_BOT,"Standard SMT resistor, capacitor etc","RESC3216N",15.24,99.06,0,bottom
diff --git a/tests/golden/hid_gerber1/Makefile.am b/tests/golden/hid_gerber1/Makefile.am
new file mode 100644
index 0000000..9d32ff3
--- /dev/null
+++ b/tests/golden/hid_gerber1/Makefile.am
@@ -0,0 +1,7 @@
+## -*- makefile -*-
+
+EXTRA_DIST= \
+ gerber_oneline.back.gbr \
+ gerber_oneline.fab.gbr \
+ gerber_oneline.front.gbr \
+ gerber_oneline.plated-drill.cnc
diff --git a/tests/golden/hid_gerber1/gerber_oneline.back.gbr b/tests/golden/hid_gerber1/gerber_oneline.back.gbr
new file mode 100644
index 0000000..b5b70e8
--- /dev/null
+++ b/tests/golden/hid_gerber1/gerber_oneline.back.gbr
@@ -0,0 +1,17 @@
+G04 start of page 3 for group 1 idx 1 *
+G04 Title: Basic Single Trace RS274-X Test, solder *
+G04 Creator: pcb 1.99y *
+G04 CreationDate: Wed Jun 24 21:42:24 2009 UTC *
+G04 For: dan *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 200000 100000 *
+G04 PCB-Coordinate-Origin: lower left *
+%MOIN*%
+%FSLAX25Y25*%
+%LNBACK*%
+%ADD11C,0.0400*%
+%ADD12C,0.0600*%
+%ADD13C,0.0350*%
+G54D11*X170000Y50000D02*X90000D01*
+G54D12*D03*
+G54D13*M02*
diff --git a/tests/golden/hid_gerber1/gerber_oneline.fab.gbr b/tests/golden/hid_gerber1/gerber_oneline.fab.gbr
new file mode 100644
index 0000000..a20714d
--- /dev/null
+++ b/tests/golden/hid_gerber1/gerber_oneline.fab.gbr
@@ -0,0 +1,1734 @@
+G04 start of page 5 for group -3984 idx -3984 *
+G04 Title: Basic Single Trace RS274-X Test, fab *
+G04 Creator: pcb 1.99y *
+G04 CreationDate: Wed Jun 24 21:42:24 2009 UTC *
+G04 For: dan *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 200000 100000 *
+G04 PCB-Coordinate-Origin: lower left *
+%MOIN*%
+%FSLAX25Y25*%
+%LNFAB*%
+%ADD14C,0.0080*%
+%ADD15C,0.0060*%
+%ADD16C,0.0100*%
+G54D14*X90000Y50000D02*Y48400D01*
+Y50000D02*X91386Y50800D01*
+X90000Y50000D02*X88614Y50800D01*
+X15000Y156250D02*Y154650D01*
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+X15000Y156250D02*X13614Y157050D01*
+G54D15*X135000Y158500D02*Y157750D01*
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+X138000Y157750D01*
+Y158500D02*Y157750D01*
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+Y158500D02*X142801D01*
+X147603D02*X148353Y157750D01*
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+X59404Y152500D02*X60154Y153250D01*
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+X64206Y152500D02*X64956Y153250D01*
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+X61956Y153250D02*X62706Y152500D01*
+X45000Y149249D02*X66757D01*
+X3000Y173500D02*X3750Y172750D01*
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+X0Y172750D02*X750Y173500D01*
+X0Y172750D02*Y171250D01*
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+X3000D01*
+X3750Y169750D01*
+Y168250D01*
+X3000Y167500D02*X3750Y168250D01*
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+X0Y168250D02*X750Y167500D01*
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+X8551Y170500D02*Y166000D01*
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+X12603D01*
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+Y167500D01*
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+X14853D01*
+X15603Y169750D01*
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+X10353Y170500D02*X11103Y169750D01*
+X17404Y173500D02*Y167500D01*
+Y168250D02*X18154Y167500D01*
+X19654D01*
+X20404Y168250D01*
+Y169750D02*Y168250D01*
+X19654Y170500D02*X20404Y169750D01*
+X18154Y170500D02*X19654D01*
+X17404Y169750D02*X18154Y170500D01*
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+Y169750D02*X22956Y170500D01*
+X24456D01*
+X25206Y169750D01*
+Y168250D01*
+X24456Y167500D02*X25206Y168250D01*
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+X51053Y170500D02*Y168250D01*
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+X55854D01*
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+X74010D01*
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+Y167500D01*
+X71760Y170500D02*X72510Y169750D01*
+X77312Y170500D02*X79562D01*
+X76562Y169750D02*X77312Y170500D01*
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+X79562D01*
+X81363Y173500D02*Y167500D01*
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+X83613D01*
+X84363Y169750D01*
+Y167500D01*
+X86165Y173500D02*X86915Y172750D01*
+Y168250D01*
+X86165Y167500D02*X86915Y168250D01*
+X95750Y167500D02*X98000D01*
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+X98000D01*
+X99801Y169750D02*Y168250D01*
+Y169750D02*X100551Y170500D01*
+X102051D01*
+X102801Y169750D01*
+Y168250D01*
+X102051Y167500D02*X102801Y168250D01*
+X100551Y167500D02*X102051D01*
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+X111654D01*
+X112404Y169750D01*
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+X109404Y170500D02*X110154Y169750D01*
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+X114206Y171250D02*X115706D01*
+X130750Y173500D02*Y167500D01*
+X130000Y173500D02*X133000D01*
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+Y171250D01*
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+X140803Y170500D02*Y168250D01*
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+X138553D02*X140053D01*
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+X146356Y168250D02*X147106Y167500D01*
+X146356Y169750D02*Y168250D01*
+Y169750D02*X147106Y170500D01*
+X148606D01*
+X149356Y169750D01*
+X146356Y169000D02*X149356D01*
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+X154157Y173500D02*Y167500D01*
+X153407D02*X154157Y168250D01*
+X151907Y167500D02*X153407D01*
+X151157Y168250D02*X151907Y167500D01*
+X151157Y169750D02*Y168250D01*
+Y169750D02*X151907Y170500D01*
+X153407D01*
+X154157Y169750D01*
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+Y168250D02*Y167500D01*
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+Y172750D02*X156709Y173500D01*
+X158209D01*
+X158959Y172750D01*
+Y172000D01*
+X157459Y170500D02*X158959Y172000D01*
+X0Y188500D02*X3000D01*
+X1500D02*Y182500D01*
+X4801Y188500D02*Y182500D01*
+Y184750D02*X5551Y185500D01*
+X7051D01*
+X7801Y184750D01*
+Y182500D01*
+X10353D02*X12603D01*
+X9603Y183250D02*X10353Y182500D01*
+X9603Y184750D02*Y183250D01*
+Y184750D02*X10353Y185500D01*
+X11853D01*
+X12603Y184750D01*
+X9603Y184000D02*X12603D01*
+Y184750D02*Y184000D01*
+X15154Y184750D02*Y182500D01*
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diff --git a/tests/golden/hid_gerber1/gerber_oneline.front.gbr b/tests/golden/hid_gerber1/gerber_oneline.front.gbr
new file mode 100644
index 0000000..c24a8fe
--- /dev/null
+++ b/tests/golden/hid_gerber1/gerber_oneline.front.gbr
@@ -0,0 +1,17 @@
+G04 start of page 2 for group 0 idx 0 *
+G04 Title: Basic Single Trace RS274-X Test, component *
+G04 Creator: pcb 1.99y *
+G04 CreationDate: Wed Jun 24 21:42:24 2009 UTC *
+G04 For: dan *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 200000 100000 *
+G04 PCB-Coordinate-Origin: lower left *
+%MOIN*%
+%FSLAX25Y25*%
+%LNFRONT*%
+%ADD11C,0.0400*%
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+%ADD13C,0.0350*%
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diff --git a/tests/golden/hid_gerber1/gerber_oneline.plated-drill.cnc b/tests/golden/hid_gerber1/gerber_oneline.plated-drill.cnc
new file mode 100644
index 0000000..5456a91
--- /dev/null
+++ b/tests/golden/hid_gerber1/gerber_oneline.plated-drill.cnc
@@ -0,0 +1,7 @@
+M48
+INCH
+T13C0.035
+%
+T13
+X009000Y005000
+M30
diff --git a/tests/golden/hid_gerber2/Makefile.am b/tests/golden/hid_gerber2/Makefile.am
new file mode 100644
index 0000000..e07c8b4
--- /dev/null
+++ b/tests/golden/hid_gerber2/Makefile.am
@@ -0,0 +1,7 @@
+## -*- makefile -*-
+
+EXTRA_DIST= \
+ out.back.gbr \
+ out.fab.gbr \
+ out.front.gbr \
+ out.plated-drill.cnc
diff --git a/tests/golden/hid_gerber2/out.back.gbr b/tests/golden/hid_gerber2/out.back.gbr
new file mode 100644
index 0000000..5e9aa06
--- /dev/null
+++ b/tests/golden/hid_gerber2/out.back.gbr
@@ -0,0 +1,17 @@
+G04 start of page 3 for group 1 idx 1 *
+G04 Title: Basic Single Trace RS274-X Test, solder *
+G04 Creator: pcb 1.99y *
+G04 CreationDate: Wed Jun 24 22:05:35 2009 UTC *
+G04 For: dan *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 200000 100000 *
+G04 PCB-Coordinate-Origin: lower left *
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diff --git a/tests/golden/hid_gerber2/out.fab.gbr b/tests/golden/hid_gerber2/out.fab.gbr
new file mode 100644
index 0000000..f1629a4
--- /dev/null
+++ b/tests/golden/hid_gerber2/out.fab.gbr
@@ -0,0 +1,1754 @@
+G04 start of page 5 for group -3984 idx -3984 *
+G04 Title: Basic Single Trace RS274-X Test, fab *
+G04 Creator: pcb 1.99y *
+G04 CreationDate: Wed Jun 24 22:05:35 2009 UTC *
+G04 For: dan *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 200000 100000 *
+G04 PCB-Coordinate-Origin: lower left *
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diff --git a/tests/golden/hid_gerber2/out.front.gbr b/tests/golden/hid_gerber2/out.front.gbr
new file mode 100644
index 0000000..37f79a8
--- /dev/null
+++ b/tests/golden/hid_gerber2/out.front.gbr
@@ -0,0 +1,17 @@
+G04 start of page 2 for group 0 idx 0 *
+G04 Title: Basic Single Trace RS274-X Test, component *
+G04 Creator: pcb 1.99y *
+G04 CreationDate: Wed Jun 24 22:05:35 2009 UTC *
+G04 For: dan *
+G04 Format: Gerber/RS-274X *
+G04 PCB-Dimensions: 200000 100000 *
+G04 PCB-Coordinate-Origin: lower left *
+%MOIN*%
+%FSLAX25Y25*%
+%LNFRONT*%
+%ADD11C,0.0400*%
+%ADD12C,0.0600*%
+%ADD13C,0.0350*%
+G54D11*X10000Y50000D02*X90000D01*
+G54D12*D03*
+G54D13*M02*
diff --git a/tests/golden/hid_gerber2/out.plated-drill.cnc b/tests/golden/hid_gerber2/out.plated-drill.cnc
new file mode 100644
index 0000000..5456a91
--- /dev/null
+++ b/tests/golden/hid_gerber2/out.plated-drill.cnc
@@ -0,0 +1,7 @@
+M48
+INCH
+T13C0.035
+%
+T13
+X009000Y005000
+M30
diff --git a/tests/inputs/Makefile.am b/tests/inputs/Makefile.am
new file mode 100644
index 0000000..b7dbb1e
--- /dev/null
+++ b/tests/inputs/Makefile.am
@@ -0,0 +1,6 @@
+## -*- makefile -*-
+
+EXTRA_DIST= \
+ bom_general.pcb \
+ gerber_oneline.pcb
+
diff --git a/tests/inputs/bom_general.pcb b/tests/inputs/bom_general.pcb
new file mode 100644
index 0000000..d61b301
--- /dev/null
+++ b/tests/inputs/bom_general.pcb
@@ -0,0 +1,1214 @@
+# release: pcb 1.99y
+# date: Wed Jun 17 10:41:24 2009
+# user: dan (Dan McMahill,At Home ,258-8142,)
+# host: bondage
+
+# To read pcb files, the pcb version (or the cvs source date) must be >= the file version
+FileVersion[20070407]
+
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+ )
+
+Element["onsolder" "Standard SMT resistor, capacitor etc" "R270_BOT" "RESC3216N" 170000 110000 -6850 13150 3 100 "auto"]
+(
+ Pad[-984 5905 984 5905 5118 2000 5718 "1" "1" "onsolder,square"]
+ Pad[-984 -5905 984 -5905 5118 2000 5718 "2" "2" "onsolder,square"]
+ ElementLine [-3543 1968 -3543 -1968 800]
+ ElementLine [3543 1968 3543 -1968 800]
+
+ )
+
+Element["onsolder" "Small outline package, narrow (150mil)" "USO0_BOT" "SO8" 60000 240000 -17500 13500 0 100 "auto"]
+(
+ Pad[-13500 7500 -7000 7500 2000 1000 3000 "1" "1" "onsolder,square"]
+ Pad[-13500 2500 -7000 2500 2000 1000 3000 "2" "2" "onsolder,square"]
+ Pad[-13500 -2500 -7000 -2500 2000 1000 3000 "3" "3" "onsolder,square"]
+ Pad[-13500 -7500 -7000 -7500 2000 1000 3000 "4" "4" "onsolder,square"]
+ Pad[7000 -7500 13500 -7500 2000 1000 3000 "5" "5" "onsolder,square,edge2"]
+ Pad[7000 -2500 13500 -2500 2000 1000 3000 "6" "6" "onsolder,square,edge2"]
+ Pad[7000 2500 13500 2500 2000 1000 3000 "7" "7" "onsolder,square,edge2"]
+ Pad[7000 7500 13500 7500 2000 1000 3000 "8" "8" "onsolder,square,edge2"]
+ ElementLine [15500 9500 2500 9500 1000]
+ ElementLine [-15500 9500 -2500 9500 1000]
+ ElementLine [15500 -9500 15500 9500 1000]
+ ElementLine [-15500 -9500 15500 -9500 1000]
+ ElementLine [-15500 9500 -15500 -9500 1000]
+ ElementArc [0 9500 2500 2500 180 180 1000]
+
+ )
+
+Element["onsolder" "Small outline package, narrow (150mil)" "USO90_BOT" "SO8" 100000 240000 -21500 -3000 1 100 "auto"]
+(
+ Pad[-7500 -13500 -7500 -7000 2000 1000 3000 "1" "1" "onsolder,square"]
+ Pad[-2500 -13500 -2500 -7000 2000 1000 3000 "2" "2" "onsolder,square"]
+ Pad[2500 -13500 2500 -7000 2000 1000 3000 "3" "3" "onsolder,square"]
+ Pad[7500 -13500 7500 -7000 2000 1000 3000 "4" "4" "onsolder,square"]
+ Pad[7500 7000 7500 13500 2000 1000 3000 "5" "5" "onsolder,square,edge2"]
+ Pad[2500 7000 2500 13500 2000 1000 3000 "6" "6" "onsolder,square,edge2"]
+ Pad[-2500 7000 -2500 13500 2000 1000 3000 "7" "7" "onsolder,square,edge2"]
+ Pad[-7500 7000 -7500 13500 2000 1000 3000 "8" "8" "onsolder,square,edge2"]
+ ElementLine [-9500 15500 -9500 2500 1000]
+ ElementLine [-9500 -2500 -9500 -15500 1000]
+ ElementLine [-9500 15500 9500 15500 1000]
+ ElementLine [9500 15500 9500 -15500 1000]
+ ElementLine [-9500 -15500 9500 -15500 1000]
+ ElementArc [-9500 0 2500 2500 90 180 1000]
+
+ )
+
+Element["onsolder" "Small outline package, narrow (150mil)" "USO180_BOT" "SO8" 130000 240000 22000 -16000 2 100 "auto"]
+(
+ Pad[7000 -7500 13500 -7500 2000 1000 3000 "1" "1" "onsolder,square,edge2"]
+ Pad[7000 -2500 13500 -2500 2000 1000 3000 "2" "2" "onsolder,square,edge2"]
+ Pad[7000 2500 13500 2500 2000 1000 3000 "3" "3" "onsolder,square,edge2"]
+ Pad[7000 7500 13500 7500 2000 1000 3000 "4" "4" "onsolder,square,edge2"]
+ Pad[-13500 7500 -7000 7500 2000 1000 3000 "5" "5" "onsolder,square"]
+ Pad[-13500 2500 -7000 2500 2000 1000 3000 "6" "6" "onsolder,square"]
+ Pad[-13500 -2500 -7000 -2500 2000 1000 3000 "7" "7" "onsolder,square"]
+ Pad[-13500 -7500 -7000 -7500 2000 1000 3000 "8" "8" "onsolder,square"]
+ ElementLine [-15500 -9500 -2500 -9500 1000]
+ ElementLine [2500 -9500 15500 -9500 1000]
+ ElementLine [-15500 9500 -15500 -9500 1000]
+ ElementLine [-15500 9500 15500 9500 1000]
+ ElementLine [15500 9500 15500 -9500 1000]
+ ElementArc [0 -9500 2500 2500 0 180 1000]
+
+ )
+
+Element["onsolder" "Small outline package, narrow (150mil)" "USO270_BOT" "SO8" 170000 240000 24000 18000 3 100 "auto"]
+(
+ Pad[7500 7000 7500 13500 2000 1000 3000 "1" "1" "onsolder,square,edge2"]
+ Pad[2500 7000 2500 13500 2000 1000 3000 "2" "2" "onsolder,square,edge2"]
+ Pad[-2500 7000 -2500 13500 2000 1000 3000 "3" "3" "onsolder,square,edge2"]
+ Pad[-7500 7000 -7500 13500 2000 1000 3000 "4" "4" "onsolder,square,edge2"]
+ Pad[-7500 -13500 -7500 -7000 2000 1000 3000 "5" "5" "onsolder,square"]
+ Pad[-2500 -13500 -2500 -7000 2000 1000 3000 "6" "6" "onsolder,square"]
+ Pad[2500 -13500 2500 -7000 2000 1000 3000 "7" "7" "onsolder,square"]
+ Pad[7500 -13500 7500 -7000 2000 1000 3000 "8" "8" "onsolder,square"]
+ ElementLine [9500 -2500 9500 -15500 1000]
+ ElementLine [9500 15500 9500 2500 1000]
+ ElementLine [-9500 -15500 9500 -15500 1000]
+ ElementLine [-9500 15500 -9500 -15500 1000]
+ ElementLine [-9500 15500 9500 15500 1000]
+ ElementArc [9500 0 2500 2500 270 180 1000]
+
+ )
+
+Element["onsolder" "Dual in-line package, narrow (300 mil)" "UDIP0_BOT" "DIP8" 40000 450000 17000 -5000 3 100 "auto"]
+(
+ Pin[0 0 6000 3000 6600 2800 "1" "1" "square"]
+ Pin[0 -10000 6000 3000 6600 2800 "2" "2" ""]
+ Pin[0 -20000 6000 3000 6600 2800 "3" "3" ""]
+ Pin[0 -30000 6000 3000 6600 2800 "4" "4" ""]
+ Pin[30000 -30000 6000 3000 6600 2800 "5" "5" ""]
+ Pin[30000 -20000 6000 3000 6600 2800 "6" "6" ""]
+ Pin[30000 -10000 6000 3000 6600 2800 "7" "7" ""]
+ Pin[30000 0 6000 3000 6600 2800 "8" "8" ""]
+ ElementLine [20000 5000 35000 5000 1000]
+ ElementLine [-5000 5000 10000 5000 1000]
+ ElementLine [35000 -35000 35000 5000 1000]
+ ElementLine [-5000 -35000 35000 -35000 1000]
+ ElementLine [-5000 5000 -5000 -35000 1000]
+ ElementArc [15000 5000 5000 5000 180 180 1000]
+
+ )
+
+Element["onsolder" "Dual in-line package, narrow (300 mil)" "UDIP90_BOT" "DIP8" 110000 420000 5000 17000 0 100 "auto"]
+(
+ Pin[0 0 6000 3000 6600 2800 "1" "1" "square"]
+ Pin[10000 0 6000 3000 6600 2800 "2" "2" ""]
+ Pin[20000 0 6000 3000 6600 2800 "3" "3" ""]
+ Pin[30000 0 6000 3000 6600 2800 "4" "4" ""]
+ Pin[30000 30000 6000 3000 6600 2800 "5" "5" ""]
+ Pin[20000 30000 6000 3000 6600 2800 "6" "6" ""]
+ Pin[10000 30000 6000 3000 6600 2800 "7" "7" ""]
+ Pin[0 30000 6000 3000 6600 2800 "8" "8" ""]
+ ElementLine [-5000 35000 -5000 20000 1000]
+ ElementLine [-5000 10000 -5000 -5000 1000]
+ ElementLine [-5000 35000 35000 35000 1000]
+ ElementLine [35000 35000 35000 -5000 1000]
+ ElementLine [-5000 -5000 35000 -5000 1000]
+ ElementArc [-5000 15000 5000 5000 90 180 1000]
+
+ )
+
+Element["onsolder" "Dual in-line package, narrow (300 mil)" "UDIP180_BOT" "DIP8" 210000 420000 -17000 5000 1 100 "auto"]
+(
+ Pin[0 0 6000 3000 6600 2800 "1" "1" "square"]
+ Pin[0 10000 6000 3000 6600 2800 "2" "2" ""]
+ Pin[0 20000 6000 3000 6600 2800 "3" "3" ""]
+ Pin[0 30000 6000 3000 6600 2800 "4" "4" ""]
+ Pin[-30000 30000 6000 3000 6600 2800 "5" "5" ""]
+ Pin[-30000 20000 6000 3000 6600 2800 "6" "6" ""]
+ Pin[-30000 10000 6000 3000 6600 2800 "7" "7" ""]
+ Pin[-30000 0 6000 3000 6600 2800 "8" "8" ""]
+ ElementLine [-35000 -5000 -20000 -5000 1000]
+ ElementLine [-10000 -5000 5000 -5000 1000]
+ ElementLine [-35000 35000 -35000 -5000 1000]
+ ElementLine [-35000 35000 5000 35000 1000]
+ ElementLine [5000 35000 5000 -5000 1000]
+ ElementArc [-15000 -5000 5000 5000 0 180 1000]
+
+ )
+
+Element["onsolder" "Dual in-line package, narrow (300 mil)" "UDIP270_BOT" "DIP8" 280000 450000 -5000 -17000 2 100 "auto"]
+(
+ Pin[0 0 6000 3000 6600 2800 "1" "1" "square"]
+ Pin[-10000 0 6000 3000 6600 2800 "2" "2" ""]
+ Pin[-20000 0 6000 3000 6600 2800 "3" "3" ""]
+ Pin[-30000 0 6000 3000 6600 2800 "4" "4" ""]
+ Pin[-30000 -30000 6000 3000 6600 2800 "5" "5" ""]
+ Pin[-20000 -30000 6000 3000 6600 2800 "6" "6" ""]
+ Pin[-10000 -30000 6000 3000 6600 2800 "7" "7" ""]
+ Pin[0 -30000 6000 3000 6600 2800 "8" "8" ""]
+ ElementLine [5000 -20000 5000 -35000 1000]
+ ElementLine [5000 5000 5000 -10000 1000]
+ ElementLine [-35000 -35000 5000 -35000 1000]
+ ElementLine [-35000 5000 -35000 -35000 1000]
+ ElementLine [-35000 5000 5000 5000 1000]
+ ElementArc [5000 -15000 5000 5000 270 180 1000]
+
+ )
+
+Element["" "Small outline package, narrow (150mil)" "USO0_TOP" "SO8" 60000 180000 -16000 -22500 0 100 ""]
+(
+ Pad[-13500 -7500 -7000 -7500 2000 1000 3000 "1" "1" "square"]
+ Pad[-13500 -2500 -7000 -2500 2000 1000 3000 "2" "2" "square"]
+ Pad[-13500 2500 -7000 2500 2000 1000 3000 "3" "3" "square"]
+ Pad[-13500 7500 -7000 7500 2000 1000 3000 "4" "4" "square"]
+ Pad[7000 7500 13500 7500 2000 1000 3000 "5" "5" "square,edge2"]
+ Pad[7000 2500 13500 2500 2000 1000 3000 "6" "6" "square,edge2"]
+ Pad[7000 -2500 13500 -2500 2000 1000 3000 "7" "7" "square,edge2"]
+ Pad[7000 -7500 13500 -7500 2000 1000 3000 "8" "8" "square,edge2"]
+ ElementLine [15500 -9500 2500 -9500 1000]
+ ElementLine [-15500 -9500 -2500 -9500 1000]
+ ElementLine [15500 9500 15500 -9500 1000]
+ ElementLine [-15500 9500 15500 9500 1000]
+ ElementLine [-15500 -9500 -15500 9500 1000]
+ ElementArc [0 -9500 2500 2500 0 180 1000]
+
+ )
+
+Element["" "Small outline package, narrow (150mil)" "USO270_TOP" "SO8" 100000 180000 -16000 22000 1 100 ""]
+(
+ Pad[-7500 7000 -7500 13500 2000 1000 3000 "1" "1" "square,edge2"]
+ Pad[-2500 7000 -2500 13500 2000 1000 3000 "2" "2" "square,edge2"]
+ Pad[2500 7000 2500 13500 2000 1000 3000 "3" "3" "square,edge2"]
+ Pad[7500 7000 7500 13500 2000 1000 3000 "4" "4" "square,edge2"]
+ Pad[7500 -13500 7500 -7000 2000 1000 3000 "5" "5" "square"]
+ Pad[2500 -13500 2500 -7000 2000 1000 3000 "6" "6" "square"]
+ Pad[-2500 -13500 -2500 -7000 2000 1000 3000 "7" "7" "square"]
+ Pad[-7500 -13500 -7500 -7000 2000 1000 3000 "8" "8" "square"]
+ ElementLine [-9500 -15500 -9500 -2500 1000]
+ ElementLine [-9500 2500 -9500 15500 1000]
+ ElementLine [-9500 -15500 9500 -15500 1000]
+ ElementLine [9500 -15500 9500 15500 1000]
+ ElementLine [-9500 15500 9500 15500 1000]
+ ElementArc [-9500 0 2500 2500 90 180 1000]
+
+ )
+
+Element["" "Small outline package, narrow (150mil)" "USO180_TOP" "SO8" 130000 180000 9000 17000 2 100 ""]
+(
+ Pad[7000 7500 13500 7500 2000 1000 3000 "1" "1" "square,edge2"]
+ Pad[7000 2500 13500 2500 2000 1000 3000 "2" "2" "square,edge2"]
+ Pad[7000 -2500 13500 -2500 2000 1000 3000 "3" "3" "square,edge2"]
+ Pad[7000 -7500 13500 -7500 2000 1000 3000 "4" "4" "square,edge2"]
+ Pad[-13500 -7500 -7000 -7500 2000 1000 3000 "5" "5" "square"]
+ Pad[-13500 -2500 -7000 -2500 2000 1000 3000 "6" "6" "square"]
+ Pad[-13500 2500 -7000 2500 2000 1000 3000 "7" "7" "square"]
+ Pad[-13500 7500 -7000 7500 2000 1000 3000 "8" "8" "square"]
+ ElementLine [-15500 9500 -2500 9500 1000]
+ ElementLine [2500 9500 15500 9500 1000]
+ ElementLine [-15500 -9500 -15500 9500 1000]
+ ElementLine [-15500 -9500 15500 -9500 1000]
+ ElementLine [15500 -9500 15500 9500 1000]
+ ElementArc [0 9500 2500 2500 180 180 1000]
+
+ )
+
+Element["" "Small outline package, narrow (150mil)" "USO90_TOP" "SO8" 170000 180000 15500 -13500 3 100 ""]
+(
+ Pad[7500 -13500 7500 -7000 2000 1000 3000 "1" "1" "square"]
+ Pad[2500 -13500 2500 -7000 2000 1000 3000 "2" "2" "square"]
+ Pad[-2500 -13500 -2500 -7000 2000 1000 3000 "3" "3" "square"]
+ Pad[-7500 -13500 -7500 -7000 2000 1000 3000 "4" "4" "square"]
+ Pad[-7500 7000 -7500 13500 2000 1000 3000 "5" "5" "square,edge2"]
+ Pad[-2500 7000 -2500 13500 2000 1000 3000 "6" "6" "square,edge2"]
+ Pad[2500 7000 2500 13500 2000 1000 3000 "7" "7" "square,edge2"]
+ Pad[7500 7000 7500 13500 2000 1000 3000 "8" "8" "square,edge2"]
+ ElementLine [9500 2500 9500 15500 1000]
+ ElementLine [9500 -15500 9500 -2500 1000]
+ ElementLine [-9500 15500 9500 15500 1000]
+ ElementLine [-9500 -15500 -9500 15500 1000]
+ ElementLine [-9500 -15500 9500 -15500 1000]
+ ElementArc [9500 0 2500 2500 270 180 1000]
+
+ )
+
+Element["" "Dual in-line package, narrow (300 mil)" "UDIP0_TOP" "DIP8" 40000 340000 17000 -35000 3 100 ""]
+(
+ Pin[0 0 6000 3000 6600 2800 "1" "1" "square"]
+ Pin[0 10000 6000 3000 6600 2800 "2" "2" ""]
+ Pin[0 20000 6000 3000 6600 2800 "3" "3" ""]
+ Pin[0 30000 6000 3000 6600 2800 "4" "4" ""]
+ Pin[30000 30000 6000 3000 6600 2800 "5" "5" ""]
+ Pin[30000 20000 6000 3000 6600 2800 "6" "6" ""]
+ Pin[30000 10000 6000 3000 6600 2800 "7" "7" ""]
+ Pin[30000 0 6000 3000 6600 2800 "8" "8" ""]
+ ElementLine [20000 -5000 35000 -5000 1000]
+ ElementLine [-5000 -5000 10000 -5000 1000]
+ ElementLine [35000 35000 35000 -5000 1000]
+ ElementLine [-5000 35000 35000 35000 1000]
+ ElementLine [-5000 -5000 -5000 35000 1000]
+ ElementArc [15000 -5000 5000 5000 0 180 1000]
+
+ )
+
+Element["" "Dual in-line package, narrow (300 mil)" "UDIP270_TOP" "DIP8" 110000 370000 5000 -17000 0 100 ""]
+(
+ Pin[0 0 6000 3000 6600 2800 "1" "1" "square"]
+ Pin[10000 0 6000 3000 6600 2800 "2" "2" ""]
+ Pin[20000 0 6000 3000 6600 2800 "3" "3" ""]
+ Pin[30000 0 6000 3000 6600 2800 "4" "4" ""]
+ Pin[30000 -30000 6000 3000 6600 2800 "5" "5" ""]
+ Pin[20000 -30000 6000 3000 6600 2800 "6" "6" ""]
+ Pin[10000 -30000 6000 3000 6600 2800 "7" "7" ""]
+ Pin[0 -30000 6000 3000 6600 2800 "8" "8" ""]
+ ElementLine [-5000 -35000 -5000 -20000 1000]
+ ElementLine [-5000 -10000 -5000 5000 1000]
+ ElementLine [-5000 -35000 35000 -35000 1000]
+ ElementLine [35000 -35000 35000 5000 1000]
+ ElementLine [-5000 5000 35000 5000 1000]
+ ElementArc [-5000 -15000 5000 5000 90 180 1000]
+
+ )
+
+Element["" "Dual in-line package, narrow (300 mil)" "UDIP180_TOP" "DIP8" 210000 370000 -17000 -5000 1 100 ""]
+(
+ Pin[0 0 6000 3000 6600 2800 "1" "1" "square"]
+ Pin[0 -10000 6000 3000 6600 2800 "2" "2" ""]
+ Pin[0 -20000 6000 3000 6600 2800 "3" "3" ""]
+ Pin[0 -30000 6000 3000 6600 2800 "4" "4" ""]
+ Pin[-30000 -30000 6000 3000 6600 2800 "5" "5" ""]
+ Pin[-30000 -20000 6000 3000 6600 2800 "6" "6" ""]
+ Pin[-30000 -10000 6000 3000 6600 2800 "7" "7" ""]
+ Pin[-30000 0 6000 3000 6600 2800 "8" "8" ""]
+ ElementLine [-35000 5000 -20000 5000 1000]
+ ElementLine [-10000 5000 5000 5000 1000]
+ ElementLine [-35000 -35000 -35000 5000 1000]
+ ElementLine [-35000 -35000 5000 -35000 1000]
+ ElementLine [5000 -35000 5000 5000 1000]
+ ElementArc [-15000 5000 5000 5000 180 180 1000]
+
+ )
+
+Element["" "Dual in-line package, narrow (300 mil)" "UDIP90_TOP" "DIP8" 280000 340000 -5000 17000 2 100 ""]
+(
+ Pin[0 0 6000 3000 6600 2800 "1" "1" "square"]
+ Pin[-10000 0 6000 3000 6600 2800 "2" "2" ""]
+ Pin[-20000 0 6000 3000 6600 2800 "3" "3" ""]
+ Pin[-30000 0 6000 3000 6600 2800 "4" "4" ""]
+ Pin[-30000 30000 6000 3000 6600 2800 "5" "5" ""]
+ Pin[-20000 30000 6000 3000 6600 2800 "6" "6" ""]
+ Pin[-10000 30000 6000 3000 6600 2800 "7" "7" ""]
+ Pin[0 30000 6000 3000 6600 2800 "8" "8" ""]
+ ElementLine [5000 20000 5000 35000 1000]
+ ElementLine [5000 -5000 5000 10000 1000]
+ ElementLine [-35000 35000 5000 35000 1000]
+ ElementLine [-35000 -5000 -35000 35000 1000]
+ ElementLine [-35000 -5000 5000 -5000 1000]
+ ElementArc [5000 15000 5000 5000 270 180 1000]
+
+ )
+
+Element["" "Standard SMT resistor, capacitor etc" "R0_TOP" "RESC3216N" 60000 70000 -11960 -10150 0 100 ""]
+(
+ Pad[-5905 -984 -5905 984 5118 2000 5718 "1" "1" "square"]
+ Pad[5905 -984 5905 984 5118 2000 5718 "2" "2" "square"]
+ ElementLine [-1968 3543 1968 3543 800]
+ ElementLine [-1968 -3543 1968 -3543 800]
+
+ )
+
+Element["" "Standard SMT resistor, capacitor etc" "R270_TOP" "RESC3216N" 100000 70000 -13150 13150 1 100 ""]
+(
+ Pad[-984 5905 984 5905 5118 2000 5718 "1" "1" "square"]
+ Pad[-984 -5905 984 -5905 5118 2000 5718 "2" "2" "square"]
+ ElementLine [3543 -1968 3543 1968 800]
+ ElementLine [-3543 -1968 -3543 1968 800]
+
+ )
+
+Element["" "Standard SMT resistor, capacitor etc" "R180_TOP" "RESC3216N" 130000 70000 13150 13150 2 100 ""]
+(
+ Pad[5905 -984 5905 984 5118 2000 5718 "1" "1" "square"]
+ Pad[-5905 -984 -5905 984 5118 2000 5718 "2" "2" "square"]
+ ElementLine [-1968 -3543 1968 -3543 800]
+ ElementLine [-1968 3543 1968 3543 800]
+
+ )
+
+Element["" "Standard SMT resistor, capacitor etc" "R90_TOP" "RESC3216N" 170000 70000 15261 -7039 3 100 ""]
+(
+ Pad[-984 -5905 984 -5905 5118 2000 5718 "1" "1" "square"]
+ Pad[-984 5905 984 5905 5118 2000 5718 "2" "2" "square"]
+ ElementLine [-3543 -1968 -3543 1968 800]
+ ElementLine [3543 -1968 3543 1968 800]
+
+ )
+Layer(1 "component")
+(
+)
+Layer(2 "solder")
+(
+)
+Layer(3 "GND")
+(
+)
+Layer(4 "power")
+(
+)
+Layer(5 "signal1")
+(
+)
+Layer(6 "signal2")
+(
+)
+Layer(7 "signal3")
+(
+)
+Layer(8 "signal4")
+(
+)
+Layer(9 "silk")
+(
+)
+Layer(10 "silk")
+(
+ Text[270000 80000 0 100 "2-pin surface mount elements" ""]
+ Text[270000 90000 0 100 "0/90/180/270 degree rotations" ""]
+ Text[270000 100000 0 100 "both sides ofthe board" ""]
+ Text[270000 190000 0 100 "multi-pin surface mount elements" ""]
+ Text[270000 200000 0 100 "0/90/180/270 degree rotations" ""]
+ Text[270000 210000 0 100 "both sides ofthe board" ""]
+ Text[310000 380000 0 100 "multi-pin leaded elements" "selected"]
+ Text[310000 390000 0 100 "0/90/180/270 degree rotations" ""]
+ Text[310000 400000 0 100 "both sides ofthe board" ""]
+)
diff --git a/tests/inputs/gerber_oneline.pcb b/tests/inputs/gerber_oneline.pcb
new file mode 100644
index 0000000..c20eacf
--- /dev/null
+++ b/tests/inputs/gerber_oneline.pcb
@@ -0,0 +1,832 @@
+# release: pcb 1.99y
+# date: Wed Jun 24 12:26:14 2009
+# user: dan (Dan McMahill,At Home ,258-8142,)
+# host: bondage
+
+# To read pcb files, the pcb version (or the cvs source date) must be >= the file version
+FileVersion[20070407]
+
+PCB["Basic Single Trace RS274-X Test" 200000 100000]
+
+Grid[10000.000000 0 0 1]
+Cursor[0 500000 0.000000]
+PolyArea[200000000.000000]
+Thermal[0.500000]
+DRC[1000 1000 1000 1000 1500 1000]
+Flags("nameonpcb,uniquename,clearnew,snappin")
+Groups("1,c:2,s:3:4:5:6:7:8")
+Styles["Signal,1000,3600,2000,1000:Power,2500,6000,3500,1000:Fat,4000,6000,3500,1000:Skinny,600,2402,1181,600"]
+
+Symbol(' ' 18)
+(
+)
+Symbol('!' 12)
+(
+ SymbolLine(0 45 0 50 8)
+ SymbolLine(0 10 0 35 8)
+)
+Symbol('"' 12)
+(
+ SymbolLine(0 10 0 20 8)
+ SymbolLine(10 10 10 20 8)
+)
+Symbol('#' 12)
+(
+ SymbolLine(0 35 20 35 8)
+ SymbolLine(0 25 20 25 8)
+ SymbolLine(15 20 15 40 8)
+ SymbolLine(5 20 5 40 8)
+)
+Symbol('$' 12)
+(
+ SymbolLine(15 15 20 20 8)
+ SymbolLine(5 15 15 15 8)
+ SymbolLine(0 20 5 15 8)
+ SymbolLine(0 20 0 25 8)
+ SymbolLine(0 25 5 30 8)
+ SymbolLine(5 30 15 30 8)
+ SymbolLine(15 30 20 35 8)
+ SymbolLine(20 35 20 40 8)
+ SymbolLine(15 45 20 40 8)
+ SymbolLine(5 45 15 45 8)
+ SymbolLine(0 40 5 45 8)
+ SymbolLine(10 10 10 50 8)
+)
+Symbol('%' 12)
+(
+ SymbolLine(0 15 0 20 8)
+ SymbolLine(0 15 5 10 8)
+ SymbolLine(5 10 10 10 8)
+ SymbolLine(10 10 15 15 8)
+ SymbolLine(15 15 15 20 8)
+ SymbolLine(10 25 15 20 8)
+ SymbolLine(5 25 10 25 8)
+ SymbolLine(0 20 5 25 8)
+ SymbolLine(0 50 40 10 8)
+ SymbolLine(35 50 40 45 8)
+ SymbolLine(40 40 40 45 8)
+ SymbolLine(35 35 40 40 8)
+ SymbolLine(30 35 35 35 8)
+ SymbolLine(25 40 30 35 8)
+ SymbolLine(25 40 25 45 8)
+ SymbolLine(25 45 30 50 8)
+ SymbolLine(30 50 35 50 8)
+)
+Symbol('&' 12)
+(
+ SymbolLine(0 45 5 50 8)
+ SymbolLine(0 15 0 25 8)
+ SymbolLine(0 15 5 10 8)
+ SymbolLine(0 35 15 20 8)
+ SymbolLine(5 50 10 50 8)
+ SymbolLine(10 50 20 40 8)
+ SymbolLine(0 25 25 50 8)
+ SymbolLine(5 10 10 10 8)
+ SymbolLine(10 10 15 15 8)
+ SymbolLine(15 15 15 20 8)
+ SymbolLine(0 35 0 45 8)
+)
+Symbol(''' 12)
+(
+ SymbolLine(0 20 10 10 8)
+)
+Symbol('(' 12)
+(
+ SymbolLine(0 45 5 50 8)
+ SymbolLine(0 15 5 10 8)
+ SymbolLine(0 15 0 45 8)
+)
+Symbol(')' 12)
+(
+ SymbolLine(0 10 5 15 8)
+ SymbolLine(5 15 5 45 8)
+ SymbolLine(0 50 5 45 8)
+)
+Symbol('*' 12)
+(
+ SymbolLine(0 20 20 40 8)
+ SymbolLine(0 40 20 20 8)
+ SymbolLine(0 30 20 30 8)
+ SymbolLine(10 20 10 40 8)
+)
+Symbol('+' 12)
+(
+ SymbolLine(0 30 20 30 8)
+ SymbolLine(10 20 10 40 8)
+)
+Symbol(',' 12)
+(
+ SymbolLine(0 60 10 50 8)
+)
+Symbol('-' 12)
+(
+ SymbolLine(0 30 20 30 8)
+)
+Symbol('.' 12)
+(
+ SymbolLine(0 50 5 50 8)
+)
+Symbol('/' 12)
+(
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diff --git a/tests/run_tests.sh b/tests/run_tests.sh
new file mode 100755
index 0000000..fd96f11
--- /dev/null
+++ b/tests/run_tests.sh
@@ -0,0 +1,602 @@
+#!/bin/sh
+#
+# $Id: run_tests.sh,v 1.8 2009/02/17 00:42:31 danmc Exp $
+#
+# Copyright (c) 2003, 2004, 2005, 2006, 2007, 2009 Dan McMahill
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of version 2 of the GNU General Public License as
+# published by the Free Software Foundation
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111 USA
+# All rights reserved.
+#
+# This code was derived from code written by Dan McMahill as part of the
+# latex-mk testsuite. The original code was covered by a BSD license
+# but the copyright holder (Dan McMahill) has re-released the code under
+# the GPL.
+
+magic_test_skip=${PCB_MAGIC_TEST_SKIP:-no}
+
+if test "x${magic_test_skip}" = "xyes" ; then
+ cat << EOF
+
+The environment variable PCB_MAGIC_TEST_SKIP is set to yes.
+This causes the testsuite to skip all tests and report no errors.
+This is used for certain debugging *only*. The primary use is to
+allow testing of the 'distcheck' target without including the effects
+of the testsuite. The reason this is useful is that due to minor differences
+in cairo versions and perhaps roundoff in different CPU's, the testsuite
+may falsely report failures on some systems. These reported failures
+prevent using 'distcheck' for verifying the rest of the build system.
+
+EOF
+
+ exit 0
+fi
+
+regen=no
+
+usage() {
+cat <<EOF
+
+$0 -- Run pcb regression tests
+
+$0 -h|--help
+$0 [-d | --debug] [-g | --golden dir] [-r|--regen] [testname1 [testname2[ ...]]]
+
+OVERVIEW
+
+The $0 script is used both for running the pcb regression testsuite
+as well as maintaining it. The way the test suite works is a number
+of different layouts are exported using the various export HID's.
+
+The resulting output files are examined in various ways to make sure
+they are correct. The exact details of how they are compared varies.
+For example, the PNG outputs are compared using tools from the ImageMagick
+suite while the ASCII centroid and bill of materials files are normalized
+with awk and then compared with the standard diff utility.
+
+OPTIONS
+
+-d | --debug Enables extra debug output
+
+-g | --golden <dir> : Specifies that <dir> should be used for the
+ reference files.
+
+LIMITATIONS
+
+- The GUI interface is not checked via the regression testsuite.
+
+- Currently actions are also not exercised
+
+EOF
+}
+
+show_sep() {
+ echo "----------------------------------------------------------------------"
+}
+
+##########################################################################
+#
+# debug print out
+#
+
+do_debug=no
+debug() {
+ if test $do_debug = yes ; then
+ cat <<EOF
+$*
+EOF
+ fi
+}
+
+##########################################################################
+#
+# command line processing
+#
+
+
+all_tests=""
+while test -n "$1"
+ do
+ case "$1"
+ in
+
+ -d|--debug)
+ do_debug=yes
+ shift
+ ;;
+
+ -h|--help)
+ usage
+ exit 0
+ ;;
+
+ -g|--golden)
+ # set the 'golden' directory.
+ REFDIR="$2"
+ shift 2
+ ;;
+
+ -r|--regen)
+ # regenerate the 'golden' output files. Use this with caution.
+ # In particular, all differences should be noted and understood.
+ regen=yes
+ shift
+ ;;
+
+ -*)
+ echo "unknown option: $1"
+ exit 1
+ ;;
+
+ *)
+ break
+ ;;
+
+ esac
+done
+
+##########################################################################
+#
+# set up various tools
+#
+
+
+all_tests="$*"
+
+# Source directory
+srcdir=${srcdir:-.}
+top_srcdir=${top_srcdir:-.}
+
+# The pcb wrapper script we want to test
+#
+# by default we will be running it from $(top_builddir)/tests/outputs/testname
+# so we need to look 3 levels up and then down to src
+PCB=${PCB:-../../../src/pcbtest.sh}
+
+# The gerbv executible
+GERBV=${GERBV:-gerbv}
+GERBV_DEFAULT_FLAGS=${GERBV_DEFAULT_FLAGS:---export=png --window=640x480}
+
+# various ImageMagick tools
+IM_ANIMATE=${IM_ANIMATE:-animate}
+IM_COMPARE=${IM_COMPARE:-compare}
+IM_COMPOSITE=${IM_COMPOSITE:-composite}
+IM_CONVERT=${IM_CONVERT:-convert}
+IM_DISPLAY=${IM_DISPLAY:-display}
+IM_MONTAGE=${IM_MONTAGE:-montage}
+
+# golden directories
+INDIR=${INDIR:-${srcdir}/inputs}
+OUTDIR=outputs
+REFDIR=${REFDIR:-${srcdir}/golden}
+
+# some system tools
+AWK=${AWK:-awk}
+
+# the list of tests to run
+TESTLIST=${srcdir}/tests.list
+
+if test "X$regen" = "Xyes" ; then
+ OUTDIR="${REFDIR}"
+fi
+
+# create output directory
+if test ! -d $OUTDIR ; then
+ mkdir -p $OUTDIR
+ if test $? -ne 0 ; then
+ echo "Failed to create output directory ${OUTDIR}"
+ exit 1
+ fi
+fi
+
+if test -z "$all_tests" ; then
+ if test ! -f ${TESTLIST} ; then
+ echo "ERROR: ($0) Test list $TESTLIST does not exist"
+ exit 1
+ fi
+ all_tests=`${AWK} 'BEGIN{FS="|"} /^#/{next} {print $1}' ${TESTLIST} | sed 's; ;;g'`
+fi
+
+if test -z "${all_tests}" ; then
+ echo "$0: No tests specified"
+ exit 0
+fi
+
+
+# fail/pass/total counts
+fail=0
+pass=0
+skip=0
+tot=0
+
+##########################################################################
+#
+# config summary
+#
+
+
+cat << EOF
+
+srcdir ${srcdir}
+top_srcdir ${top_srcdir}
+
+AWK ${AWK}
+PCB ${PCB}
+INDIR ${INDIR}
+OUTDIR ${OUTDIR}
+REFDIR ${REFDIR}
+TESTLIST ${TESTLIST}
+
+Gerbv:
+
+GERBV ${GERBV}
+GERBV_DEFAULT_FLAGS ${GERBV_DEFAULT_FLAGS}
+
+ImageMagick Tools:
+
+IM_ANIMATE ${IM_ANIMATE}
+IM_COMPARE ${IM_COMPARE}
+IM_COMPOSITE ${IM_COMPOSITE}
+IM_CONVERT ${IM_CONVERT}
+IM_DISPLAY ${IM_DISPLAY}
+IM_MONTAGE ${IM_MONTAGE}
+
+EOF
+
+tmpd=/tmp/pcb_tests.$$
+mkdir -p -m 0700 $tmpd
+rc=$?
+if test $rc -ne 0 ; then
+ echo "$0: ERROR: could not create $tmpd"
+ exit 1
+fi
+
+##########################################################################
+#
+# utility functions for comparison
+#
+
+compare_check() {
+ fn="$1"
+ f1="$2"
+ f2="$3"
+
+ if test ! -f "$f2" ; then
+ echo "$0: ${fn}(): $f1 does not exist"
+ test_skipped=yes
+ return 1
+ fi
+
+ if test ! -f "$f2" ; then
+ echo "$0: ${fn}(): $f2 does not exist"
+ test_skipped=yes
+ return 1
+ fi
+ return 0
+}
+
+##########################################################################
+#
+# ASCII file comparison routines
+#
+
+run_diff() {
+ f1="$1"
+ f2="$2"
+ diff -U 2 $f1 $f2
+ if test $? -ne 0 ; then return 1 ; fi
+ return 0
+}
+
+##########################################################################
+#
+# BOM comparison routines
+#
+
+# used to remove things like creation date from BOM files
+normalize_bom() {
+ f1="$1"
+ f2="$2"
+ $AWK '
+ /^# Date:/ {print "# Date: today"; next}
+ /^# Author:/ {print "# Author: PCB"; next}
+ {print}' \
+ $f1 > $f2
+}
+
+# top level function to compare BOM output
+compare_bom() {
+ f1="$1"
+ f2="$2"
+ compare_check "compare_bom" "$f1" "$f2" || return 1
+
+ # an example BOM file is:
+
+ # # $Id$
+ # # PcbBOM Version 1.0
+ # # Date: Wed Jun 17 14:41:43 2009 UTC
+ # # Author: Dan McMahill
+ # # Title: Basic BOM/XY Test - PCB BOM
+ # # Quantity, Description, Value, RefDes
+ # # --------------------------------------------
+ # 8,"Standard SMT resistor, capacitor etc","RESC3216N",R90_TOP R180_TOP R270_TOP R0_TOP R270_BOT R180_BOT R90_BOT R0_BOT
+ # 8,"Dual in-line package, narrow (300 mil)","DIP8",UDIP90_TOP UDIP180_TOP UDIP270_TOP UDIP0_TOP UDIP270_BOT UDIP180_BOT UDIP90_BOT UDIP0_BOT
+ # 8,"Small outline package, narrow (150mil)","SO8",USO90_TOP USO180_TOP USO270_TOP USO0_TOP USO270_BOT USO180_BOT USO90_BOT USO0_BOT
+
+ # For comparison, we need to ignore chnages in the Date and Author lines.
+ cf1=${tmpd}/`basename $f1`
+ cf2=${tmpd}/`basename $f2`
+
+ normalize_bom $f1 $cf1
+ normalize_bom $f2 $cf2
+ run_diff $cf1 $cf2 || test_failed=yes
+}
+
+##########################################################################
+#
+# X-Y (centroid) comparison routines
+#
+
+compare_xy() {
+ f1="$1"
+ f2="$2"
+ compare_check "compare_xy" "$f1" "$f2" || return 1
+}
+
+##########################################################################
+#
+# RS274-X and Excellon comparison
+#
+
+compare_rs274x() {
+ f1="$1"
+ f2="$2"
+ compare_check "compare_rs274x" "$f1" "$f2" || return 1
+
+ # use gerbv to export our reference RS274-X file and our generated
+ # RS274-X file to png. Then we'll use ImageMagick to see
+ # if there are any differences in the resulting files
+ pngdir=${rundir}/png
+ mkdir -p ${pngdir}
+ nb=`basename $f1`
+ png1=${pngdir}/${nb}-ref.png
+ png2=${pngdir}/${nb}-out.png
+
+ debug "${GERBV} ${GERBV_DEFAULT_FLAGS} --output=${png1} ${f1}"
+ ${GERBV} ${GERBV_DEFAULT_FLAGS} --output=${png1} ${f1}
+
+ debug "${GERBV} ${GERBV_DEFAULT_FLAGS} --output=${png2} ${f2}"
+ ${GERBV} ${GERBV_DEFAULT_FLAGS} --output=${png2} ${f2}
+
+ # now see if the png files are the same
+ debug "${IM_COMPARE} -metric MAE ${png1} ${png2} null:"
+ same=`${IM_COMPARE} -metric MAE ${png1} ${png2} null: 2>&1 | \
+ ${AWK} '{if($1 == 0){print "yes"} else {print "no"}}'`
+ debug "compare_rs274x(): same = $same"
+
+ if test "$same" != yes ; then
+ test_failed=yes
+ echo "FAILED: See ${errdir}"
+ mkdir -p ${errdir}
+ ${IM_COMPARE} ${png1} ${png2} ${errdir}/compare.png
+ ${IM_COMPOSITE} ${png1} ${png2} -compose difference ${errdir}/composite.png
+ ${IM_CONVERT} ${png1} ${png2} -compose difference -composite -colorspace gray ${errdir}/gray.png
+ cat > ${errdir}/animate.sh << EOF
+#!/bin/sh
+${IM_CONVERT} -label "%f" ${png1} ${png2} miff:- | \
+${IM_MONTAGE} - -geometry +0+0 -tile 1x1 miff:- | \
+${IM_ANIMATE} -delay 0.5 -loop 0 -
+EOF
+ chmod a+x ${errdir}/animate.sh
+ fi
+
+}
+
+compare_cnc() {
+ compare_rs274x $*
+}
+
+##########################################################################
+#
+# GIF/JPEG/PNG comparison routines
+#
+
+compare_image() {
+ f1="$1"
+ f2="$2"
+ compare_check "compare_image" "$f1" "$f2" || return 1
+}
+
+##########################################################################
+#
+# The main program loop
+#
+
+for t in $all_tests ; do
+ show_sep
+ echo "Test: $t"
+
+ tot=`expr $tot + 1`
+
+ ######################################################################
+ #
+ # extract the details for the test
+ #
+
+ pcb_flags="${PCB_DEFAULT_FLAGS}"
+
+ rundir="${OUTDIR}/${t}"
+ refdir="${REFDIR}/${t}"
+ errdir=${rundir}/mismatch
+
+ # test_name | layout file(s) | [export hid name] | [optional arguments to pcb] | [mismatch]
+ # | output files
+ name=`grep "^[ \t]*${t}[ \t]*|" $TESTLIST | $AWK 'BEGIN{FS="|"} {print $1}'`
+ files=`grep "^[ \t]*${t}[ \t]*|" $TESTLIST | $AWK 'BEGIN{FS="|"} {print $2}'`
+ hid=`grep "^[ \t]*${t}[ \t]*|" $TESTLIST | $AWK 'BEGIN{FS="|"} {gsub(/[ \t]*/, ""); print $3}'`
+ args=`grep "^[ \t]*${t}[ \t]*|" $TESTLIST | $AWK 'BEGIN{FS="|"} {print $4}'`
+ mismatch=`grep "^[ \t]*${t}[ \t]*|" $TESTLIST | $AWK 'BEGIN{FS="|"} {if($5 == "mismatch"){print "yes"}else{print "no"}}'`
+ out_files=`grep "^[ \t]*${t}[ \t]*|" $TESTLIST | $AWK 'BEGIN{FS="|"} {print $6}'`
+
+ if test "X${name}" = "X" ; then
+ echo "ERROR: Specified test ${t} does not appear to exist"
+ skip=`expr $skip + 1`
+ continue
+ fi
+
+ if test "X${args}" != "X" ; then
+ pcb_flags="${args}"
+ fi
+
+ ######################################################################
+ #
+ # Set up the run directory
+ #
+
+ test -d ${rundir} && rm -fr ${rundir}
+ mkdir -p ${rundir}
+ if test $? -ne 0 ; then
+ echo "$0: Could not create run directory ${rundir}"
+ skip=`expr $skip + 1`
+ continue
+ fi
+
+
+ ######################################################################
+ #
+ # check to see if the files we need exist and copy them to the run
+ # directory
+ #
+
+ missing_files=no
+ path_files=""
+ for f in $files ; do
+ if test ! -f ${INDIR}/${f} ; then
+ echo "ERROR: File $f specified as part of the $t test does not exist"
+ missing_files=yes
+ else
+ path_files="${path_files} ${INDIR}/${f}"
+ cp "${INDIR}/${f}" "${rundir}"
+ fi
+ done
+
+ if test "$missing_files" = "yes" ; then
+ echo "${t} had missing input files. Skipping test"
+ skip=`expr $skip + 1`
+ continue
+ fi
+
+ ######################################################################
+ #
+ # run PCB
+ #
+
+ echo "${PCB} -x ${hid} ${pcb_flags} ${path_files}"
+ (cd ${rundir} && ${PCB} -x ${hid} ${pcb_flags} ${files})
+ pcb_rc=$?
+
+ if test $pcb_rc -ne 0 ; then
+ echo "${PCB} returned ${pcb_rc}. This is a failure."
+ fail=`expr $fail + 1`
+ continue
+ fi
+
+ # and clean up the input files we'd copied over
+ for f in $files ; do
+ rm ${rundir}/${f}
+ done
+
+ ######################################################################
+ #
+ # check the result
+ #
+
+ if test "X$regen" = "Xyes" ; then
+ echo "Regenerated ${t}"
+ else
+ # compare the result to our reference file
+ test_failed=no
+ test_skipped=no
+ for f in $out_files ; do
+ debug "processing $f"
+ # break apart type:fn into the type and file name
+ type=`echo $f | sed 's;:.*;;g'`
+ fn=`echo $f | sed 's;.*:;;g'`
+
+ case $type in
+ # BOM HID
+ bom)
+ compare_bom ${refdir}/${fn} ${rundir}/${fn}
+ ;;
+
+ xy)
+ compare_xy ${refdir}/${fn} ${rundir}/${fn}
+ ;;
+
+ # GERBER HID
+ cnc)
+ compare_cnc ${refdir}/${fn} ${rundir}/${fn}
+ ;;
+
+ gbx)
+ compare_rs274x ${refdir}/${fn} ${rundir}/${fn}
+ ;;
+
+ # PNG HID
+ gif)
+ compare_image ${refdir}/${fn} ${rundir}/${fn}
+ ;;
+
+ jpg)
+ compare_image ${refdir}/${fn} ${rundir}/${fn}
+ ;;
+
+ png)
+ compare_image ${refdir}/${fn} ${rundir}/${fn}
+ ;;
+
+ # unknown
+ *)
+ echo "internal error: $type is not a known file type"
+ exit 1
+ ;;
+ esac
+
+ done
+
+
+ if test $test_failed = yes ; then
+ echo "FAIL"
+ fail=`expr $fail + 1`
+ elif test $test_skipped = yes ; then
+ echo "SKIPPED"
+ skip=`expr $skip + 1`
+ else
+ echo "PASSED"
+ pass=`expr $pass + 1`
+ fi
+
+ fi
+
+done
+
+show_sep
+echo "Passed $pass, failed $fail, skipped $skip out of $tot tests."
+
+rc=0
+if test $pass -ne $tot ; then
+ rc=1
+fi
+
+exit $rc
+
diff --git a/tests/tests.list b/tests/tests.list
new file mode 100644
index 0000000..d4ca7fd
--- /dev/null
+++ b/tests/tests.list
@@ -0,0 +1,108 @@
+# Copyright (c) 2003, 2004, 2005, 2006, 2007, 2009 Dan McMahill
+#
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of version 2 of the GNU General Public License as
+# published by the Free Software Foundation
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111 USA
+# All rights reserved.
+#
+# This code was derived from code written by Dan McMahill as part of the
+# latex-mk testsuite. The original code was covered by a BSD license
+# but the copyright holder is releasing the version for pcb under the GPL.
+#
+#
+# Format:
+#
+# test_name | layout file(s) | [export hid name] | [optional arguments to pcb] | [mismatch]
+# | output file(s)
+#
+# test_name - a single string with no spaces, tabs, *, +, ? (i.e. any "special"
+# characters) that identifies the test.
+#
+# layout file(s) - a list of layout files. Files listed are relative to
+# the $(top_srcdir)/tests/inputs directory.
+#
+# [export hid name] - the name of the export HID to use. This is used both for
+# running pcb as well as determining how we process the output
+#
+# [optional arguments to pcb] - a list of additional arguments to be passed to pcb.
+# This is where one would specify additional options which are specific to a particular
+# export HID.
+#
+# [mismatch] If specified as "mismatch" (no quotes), then the result
+# should *not* match the reference. This can be thought of as a test
+# on the testsuite to make sure we can properly detect when a change has
+# occurred.
+#
+# output file(s) - a list of output files and their associated types. For
+# example:
+# bom:bom_general.bom xy:test.txt
+# specifies that "bom_general.bom" is created and it is a bill of materials file
+# and that "test.txt" is created and it is a centroid (X-Y) file.
+#
+# File types grouped by which HID produces them are:
+#
+# BOM
+#
+# bom -- PCB bill of materials file
+# xy -- PCB centroid file
+#
+# GERBER
+#
+# cnc -- Excellon drill file
+# gbx -- RS274-X (Gerber) file
+#
+# PNG
+#
+# gif -- GIF file
+# jpg -- JPEG file
+# png -- Portable network graphics (PNG) file
+#
+#
+######################################################################
+# ---------------------------------------------
+# BOM export HID
+# ---------------------------------------------
+######################################################################
+#
+# options:
+# --bomfile <string> BOM output file
+# --xyfile <string> XY output file
+# --xy-in-mm XY dimensions in mm instead of mils
+#
+#
+# Produces a bill of materials (BOM) file and a centroid (XY) file
+#
+hid_bom1 | bom_general.pcb | bom | | | bom:bom_general.bom xy:bom_general.xy
+hid_bom2 | bom_general.pcb | bom | --bomfile test.bom | | bom:test.bom xy:bom_general.xy
+hid_bom3 | bom_general.pcb | bom | --xyfile test.xy | | bom:bom_general.bom xy:test.xy
+hid_bom4 | bom_general.pcb | bom | --xy-in-mm | | bom:bom_general.bom xy:bom_general.xy
+#
+######################################################################
+# ---------------------------------------------
+# Gerber export HID
+# ---------------------------------------------
+######################################################################
+#
+# options:
+# --bomfile <string> BOM output file
+# --xyfile <string> XY output file
+# --xy-in-mm XY dimensions in mm instead of mils
+#
+#
+# Produces RS274-X (a.k.a. gerber) photo plot files and Excellon drill files
+#
+# we can't include gbx:gerber_oneline.fab.gbr yet because it has a name and a date stamp
+hid_gerber1 | gerber_oneline.pcb | gerber | | | gbx:gerber_oneline.back.gbr gbx:gerber_oneline.front.gbr cnc:gerber_oneline.plated-drill.cnc
+hid_gerber2 | gerber_oneline.pcb | gerber | --gerberfile out | | gbx:out.back.gbr gbx:out.front.gbr cnc:out.plated-drill.cnc
+#
+
+
commit 0f84a6a5b0d0990b14cc0eec89c8e837ab1ecad7
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
Document the FreeRotateBuffer() action.
Add syntax and help strings as well as the manual documentation
for the FreeRotateBuffer() action.
diff --git a/src/buffer.c b/src/buffer.c
index 8acbfce..a39e7cd 100644
--- a/src/buffer.c
+++ b/src/buffer.c
@@ -1087,6 +1087,21 @@ FreeRotateBuffer (BufferTypePtr Buffer, double Angle)
SetBufferBoundingBox (Buffer);
}
+
+/* -------------------------------------------------------------------------- */
+
+static const char freerotatebuffer_syntax[] =
+ "FreeRotateBuffer(Angle)";
+
+static const char freerotatebuffer_help[] =
+ "Rotates the current paste buffer contents by the specified angle. The\n"
+ "angle is given in degrees.\n";
+
+/* %start-doc actions FreeRotateBuffer
+
+Rotates the contents of the pastebuffer by an arbitrary angle.
+%end-doc */
+
int
ActionFreeRotateBuffer(int argc, char **argv, int x, int y)
{
@@ -1334,7 +1349,7 @@ CopyObjectToBuffer (DataTypePtr Destination, DataTypePtr Src,
HID_Action rotate_action_list[] = {
{"FreeRotateBuffer", 0, ActionFreeRotateBuffer,
- 0,0}
+ freerotatebuffer_syntax, freerotatebuffer_help}
};
REGISTER_ACTIONS (rotate_action_list)
commit a3a7e8f0e2e4b5fec29d807eaf635fa7366105c8
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
Add a comment about breakouts for fine pitch power pins and the autorouter.
Add a comment about breakouts for fine pitch power pins and the autorouter.
Suggested by harry on geda-user.
diff --git a/doc/pcb.texi b/doc/pcb.texi
index ad53c4c..f9f0503 100644
--- a/doc/pcb.texi
+++ b/doc/pcb.texi
@@ -2351,7 +2351,12 @@ new vias.
@item Draw continuous lines (on all routing layers) to outline keep-out
zones if desired.
-@item Use routing styles in the netlist to have per-net routing styles.
+@item Use routing styles in the netlist to have per-net routing styles.
+ Note that the routing style will be used for an entire net. This means
+ if you have a wide metal setting for a power net you will need to manually
+ route breakouts from any fine pitch parts on their power pins because
+ the router will not be able to change to a narrow trace to connect
+ to the part.
@item Set the current routing style to whatever you'd like the router to
use for any nets not having a defined route style in the netlist.
commit 56edd54453be28846854b45b73c41c7f66965855
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
Add a short chapter on using the autorouter.
Add a short chapter on using the autorouter based on email
instructions from harry on geda-user.
diff --git a/doc/pcb.texi b/doc/pcb.texi
index 634134d..ad53c4c 100644
--- a/doc/pcb.texi
+++ b/doc/pcb.texi
@@ -70,6 +70,7 @@ board layout system for @code{X11}.
* Overview:: An overview of @code{Pcb}.
* Intro:: A short description of the basic objects.
* Getting Started:: Introduction to @code{Pcb}.
+* Autorouter:: Using the autorouter.
* User Commands:: User commands of @code{Pcb}.
* Command-Line Options:: Calling @code{Pcb} from a shell.
* X11 Interface:: Action routines, resources and default translation.
@@ -212,7 +213,8 @@ apologize; please send me an e-mail and I'll try to correct the omission.
Pcb is a printed circuit board editor for the X11 window system.
Pcb includes many professional features such as:
@itemize @bullet
-@item Up to 8 copper layer designs
+@item Up to 8 copper layer designs by default, unlimited by changing a
+compile time setting.
@item RS-274-X (Gerber) output
@item NC Drill output
@item Centroid (X-Y) data output
@@ -2312,7 +2314,80 @@ Note that the expressions used in the @code{skips} section are regular
expressions. See @ref{Regular Expressions} for an introduction to
regular expressions.
-@c --------------------------- chapter 3 -------------------------------
+@c --------------------------- Autorouter Chapter -------------------------------
+@node Autorouter
+@chapter Autorouter
+@cindex autorouter
+
+@code{Pcb} includes an autorouter which can greatly speed up the
+layout of a circuit board. The autorouter is a rectangle-expansion
+type of autorouter based on
+``A Method for Gridless Routing of Printed Circuit Boards'' by
+A. C. Finch, K. J. Mackenzie, G. J. Balsdon, and G. Symonds in the
+1985 Proceedings of the 22nd ACM/IEEE Design Automation Conference.
+This reference is available from the ACM Digital Library at
+@url{http://www.acm.org/dl} for those with institutional or personal
+access to it. It's also available from your local engineering
+library. The reference paper is not needed for using the autorouter.
+
+Before using the autorouter, all elements need to be loaded into the
+layout and placed and the connectivity netlist must be loaded. Once
+the elements have been placed and the netlist loaded, the following
+steps will autoroute your design.
+
+@enumerate
+@item Turn off visibility of any layers that you don't want the router
+to use.
+
+@item Turn of via visibility if you don't want the router to use any
+new vias.
+
+@item Use only plain rectangles for power/ground planes that you want
+ the router to use [use the rectangle tool!]
+
+@item Make at least one connection from any plane you want the router to
+ use to the net you want it to connect to.
+
+@item Draw continuous lines (on all routing layers) to outline keep-out
+ zones if desired.
+
+@item Use routing styles in the netlist to have per-net routing styles.
+
+@item Set the current routing style to whatever you'd like the router to
+ use for any nets not having a defined route style in the netlist.
+
+@item Disable any nets that you don't want the autorouter to route
+ (double-click them in the netlist window to add/remove the *)
+
+ NOTE: If you will be manually routing these later not using
+ planes, it is usually better to let the autorouter route them then rip
+ them up yourself afterwards. If you plan to use a ground/power plane
+ manually, consider making it from one or more pure rectangles and
+ letting the autorouter have a go at it.
+
+@item Create a fresh rat's nest. ('E' the 'W')
+
+@item Select ``show autorouter trials'' in the settings menu if you want
+ to watch what's happening
+
+@item Choose ``autoroute all rats'' in the connection menu.
+
+@item If you really want to muck with the router because you have a
+ special design, e.g. all through-hole components you can mess with
+ layer directional costs by editing the autoroute.c source file and
+ changing the directional costs in lines 929-940. and try again. Even
+ more mucking about with costs is possible in lines 4540-4569, but it's
+ probably not such a good idea unless you really just want to
+ experiment.
+
+@end enumerate
+
+After the design has been autorouted, you may want to run the trace
+optimizer. See section @ref{Trace Optimizer} for more information on
+the trace optimizer.
+
+
+@c --------------------------- User Commands chapter -------------------------------
@node User Commands
@chapter User Commands
commit 69ae9955ac31e72df70338e1fd30414ea2ff2719
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
Improve the pre-install pcb wrapper script.
The pcbtest.sh wrapper script is used to run pcb for testing
before pcb is installed. Improve the robustness of this script
to allow it to be run from a different directory from where it
is created as well as allowing the export HID's to be called
with it.
diff --git a/src/pcbtest.sh.in b/src/pcbtest.sh.in
index c7dfe8d..e1e97b2 100755
--- a/src/pcbtest.sh.in
+++ b/src/pcbtest.sh.in
@@ -37,11 +37,44 @@
# Use --g-fatal-warnings with the gtk HID to cause gtk-WARNING's to
# abort.
-TEST_PATHS="--lib-path ../lib --lib-newlib @TOPSRCDIR@/newlib:@TOP_BUILDDIR@/lib/pcblib-newlib --element-path @TOP_BUILDDIR@/lib --font-path @TOPSRCDIR@/src"
+TEST_PATHS="--lib-path @TOP_BUILDDIR@/lib --lib-newlib @TOPSRCDIR@/newlib:@TOP_BUILDDIR@/lib/pcblib-newlib --element-path @TOP_BUILDDIR@/lib --font-path @TOPSRCDIR@/src"
TEST_CMDS="--lib-command-dir @TOP_BUILDDIR@/lib"
+# note: To do command line exporting, pcb requires the "-x <export_hid>" command to appear first. For example
+#
+# pcb -x bom [other args] pcbfile
+#
+# as opposed to
+#
+# pcb [other args] -x bom pcbfile
+#
+
+use_gdb=no
if [ "X$1" = "X-gdb" ]; then
+ use_gdb=yes
shift
+fi
+
+args=""
+export_args=""
+
+while test $# -ne 0 ; do
+ case $1 in
+ -x)
+ export_args="$1 $2"
+ shift 2
+ ;;
+ *)
+ args="$args $1"
+ shift
+ ;;
+ esac
+done
+
+# build up the complete argument list
+arg_list="$export_args $TEST_PATHS $TEST_CMDS $args"
+
+if test $use_gdb = yes ; then
tmpd=/tmp/pcbtest.$$
tmpf=${tmpd}/pcbtest.gdb
mkdir -p -m 0700 ${tmpd}
@@ -51,10 +84,12 @@ if [ "X$1" = "X-gdb" ]; then
echo " mkdir returned $rc"
exit 1
fi
- echo set args $TEST_PATHS $TEST_CMDS "$@" > $tmpf
+ cat > $tmpf << EOF
+set args $arg_list
+EOF
exec gdb -x $tmpf ./pcb
rm -fr $tmpd
else
- exec ./pcb $TEST_PATHS $TEST_CMDS "$@"
+ exec @TOP_BUILDDIR@/src/pcb $arg_list
fi
commit 8039b7114c038b05688f0e7c2a527a187cda242e
Author: Dan McMahill <dan@xxxxxxxxxxxx>
Commit: Dan McMahill <dan@xxxxxxxxxxxx>
add some checks for tools that will be useful for a testsuite.
Currently nothing happens if they are not found except for a message
about them not being found.
diff --git a/configure.ac b/configure.ac
index a19a0fd..529728b 100644
--- a/configure.ac
+++ b/configure.ac
@@ -163,7 +163,7 @@ AC_PATH_PROG(CONVERT, convert, notfound)
#
#
if test "X$docs_yesno" = "Xyes" -a "X$pcb_git_version" = "Xyes" ; then
- AC_CHECK_PROGS(MKINFO, makeinfo, no)
+ AC_PATH_PROG(MKINFO, makeinfo, no)
if test "X$MKINFO" != "Xno"; then
AC_MSG_CHECKING([for GNU makeinfo version >= 4.6])
v=`$MKINFO --version | grep "GNU texinfo"`
@@ -193,7 +193,7 @@ the documentation with --disable-doc
])
fi
- AC_CHECK_PROGS(TEXI2DVI, texi2dvi, no)
+ AC_PATH_PROG(TEXI2DVI, texi2dvi, no)
if test "X$TEXI2DVI" = "Xno"; then
AC_MSG_ERROR([You have requested a build
of the documentation. For this to work, you must have the texi2dvi program
@@ -498,22 +498,23 @@ GNUM4=$M4
AC_SUBST(GNUM4)
AC_DEFINE_UNQUOTED(GNUM4,"$M4",[m4 program used by pcb])
-AC_CHECK_PROGS(LATEX, latex, notfound)
+AC_PATH_PROG(LATEX, latex, notfound)
AM_CONDITIONAL(MISSING_LATEX, test x$LATEX = xnotfound)
-AC_CHECK_PROGS(PDFLATEX, pdflatex, notfound)
+AC_PATH_PROG(PDFLATEX, pdflatex, notfound)
AM_CONDITIONAL(MISSING_PDFLATEX, test x$PDFLATEX = xnotfound)
-AC_CHECK_PROGS(DVIPS, dvips, notfound)
+AC_PATH_PROG(DVIPS, dvips, notfound)
AM_CONDITIONAL(MISSING_DVIPS, test x$DVIPS = xnotfound)
-AC_CHECK_PROGS(TEXI2DVI, texi2dvi, notfound)
+AC_PATH_PROG(TEXI2DVI, texi2dvi, notfound)
AM_CONDITIONAL(MISSING_TEXI2DVI, test x$TEXI2DVI = xnotfound)
-AC_CHECK_PROGS(PS2PDF, ps2pdf, notfound)
+AC_PATH_PROG(PS2PDF, ps2pdf, notfound)
AM_CONDITIONAL(MISSING_PS2PDF, test x$PS2PDF = xnotfound)
-AC_CHECK_PROGS(GSCHEM, gschem, notfound)
+# used to build some of the getting started guide
+AC_PATH_PROG(GSCHEM, gschem, notfound)
AM_CONDITIONAL(MISSING_GSCHEM, test x$GSCHEM = xnotfound)
if test "X$docs_yesno" = "Xyes" -a "X$pcb_git_version" = "Xyes" ; then
@@ -534,6 +535,53 @@ by using the --disable-doc configure option.
fi
fi
+############################################################################
+#
+# These checks are for tools used by the testsuite. It will not be fatal
+# if these are missing because this is primarily for developer use. It is
+# possible that we might add some --enable flag in the future that forces
+# full tools for development work.
+
+# Check for ImageMagick tools used by the testsuite
+AC_PATH_PROG(IM_ANIMATE, animate, notfound)
+AC_PATH_PROG(IM_COMPARE, compare, notfound)
+AC_PATH_PROG(IM_COMPOSITE, composite, notfound)
+AC_PATH_PROG(IM_CONVERT, convert, notfound)
+AC_PATH_PROG(IM_DISPLAY, display, notfound)
+AC_PATH_PROG(IM_MONTAGE, montage, notfound)
+missing_magick=""
+test "${IM_ANIMATE}" != "notfound" || missing_magick="${missing_magick} animate"
+test "${IM_COMPARE}" != "notfound" || missing_magick="${missing_magick} compare"
+test "${IM_COMPOSITE}" != "notfound" || missing_magick="${missing_magick} composite"
+test "${IM_CONVERT}" != "notfound" || missing_magick="${missing_magick} convert"
+test "${IM_DISPLAY}" != "notfound" || missing_magick="${missing_magick} display"
+test "${IM_MONTAGE}" != "notfound" || missing_magick="${missing_magick} montage"
+
+AC_MSG_CHECKING([if all ImageMagick tools needed for the testsuite were found])
+if test "X${missing_magick}" != "X" ; then
+ AC_MSG_RESULT([no. The testsuite will be disabled because the following
+tools from the ImageMagick suite were not found:
+${missing_magick}
+No loss in pcb functionality should be experienced, you just will not
+be able to run the full regression testsuite.
+])
+ have_magick=no
+else
+ AC_MSG_RESULT([yes])
+ have_magick=yes
+fi
+AM_CONDITIONAL(HAVE_MAGICK, test x$have_magick = xyes)
+
+# the RS274-X export HID is partially checked by looking at the result with
+# gerbv
+AC_PATH_PROG(GERBV, gerbv, notfound)
+AM_CONDITIONAL(MISSING_GERBV, test x$GERBV = xnotfound)
+
+
+#
+############################################################################
+
+
dnl Checks for libraries.
AC_CHECK_LIB(m, sqrt)
AC_CHECK_LIB(dl, dlopen)
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