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Re: gEDA-cvs: pcb.git: branch: master updated (99b23b942f4733a6e3c5333b13c90d6343f340dd)



> commit cf5633edad7166066465fbdf4caf826d5d03a31e
> Author: DJ Delorie <dj@xxxxxxxxxxx>
> Commit: DJ Delorie <dj@xxxxxxxxxxx>
> 
>     Add more flexibility to the import::make option.
>     
>     New attributes:
>     
>     make::outfile - the intermediate action file
>     make::target - the makefile target to call (defaults to outfile or pcb_import)
>     make::makefile - adds -f to make
>     
>     Added more documentation too.

Cool - thanks DJ - sorry I didn't reply to your previous email about
this stuff.

I presume it is still possible to call make with an "" target..
(Can we place an empty make::target attribute?)

-- 
Peter Clifton

Electrical Engineering Division,
Engineering Department,
University of Cambridge,
9, JJ Thomson Avenue,
Cambridge
CB3 0FA

Tel: +44 (0)7729 980173 - (No signal in the lab!)



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