gEDA-cvs: pcb.git: branch: master updated (2ecfd4600a4a43625b6ab619e6286eb7f33090d8)

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      from  ab26fd07724fe0e7dfc95fae3bdeb1ecfb8692e5 (commit)

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=========
 Summary
=========

 src/draw.c |   86 ------------------------------------------------------------
 1 files changed, 0 insertions(+), 86 deletions(-)


=================
 Commit Messages
=================

commit 2ecfd4600a4a43625b6ab619e6286eb7f33090d8
Author: Peter Clifton <pcjc2@xxxxxxxxx>
Commit: Peter Clifton <pcjc2@xxxxxxxxx>

    draw.c: Don't clear pins / vias from polygons... it is already done!
    
    Our polygons already the required holes for pins, vias, pads etc..
    so don't waste drawing clearances twice. This looks to be a legacy
    from the way PCB used to draw polygons.

:100644 100644 946668f... 4605ae5... M	src/draw.c

=========
 Changes
=========

commit 2ecfd4600a4a43625b6ab619e6286eb7f33090d8
Author: Peter Clifton <pcjc2@xxxxxxxxx>
Commit: Peter Clifton <pcjc2@xxxxxxxxx>

    draw.c: Don't clear pins / vias from polygons... it is already done!
    
    Our polygons already the required holes for pins, vias, pads etc..
    so don't waste drawing clearances twice. This looks to be a legacy
    from the way PCB used to draw polygons.

diff --git a/src/draw.c b/src/draw.c
index 946668f..4605ae5 100644
--- a/src/draw.c
+++ b/src/draw.c
@@ -1162,54 +1162,6 @@ ClearOnlyPin (PinTypePtr Pin, Boolean mask)
     }
 }
 
-/* ---------------------------------------------------------------------------
- * lowlevel drawing routine for pins and vias that pierce polygons
- */
-void
-ClearPin (PinTypePtr Pin, int Type, int unused)
-{
-  BDimension half = (Pin->Thickness + Pin->Clearance) / 2;
-
-  if (Gathering)
-    {
-      AddPart (Pin);
-      return;
-    }
-  /* Clear the area around the pin */
-  if (TEST_FLAG (SQUAREFLAG, Pin))
-    {
-      int l, r, t, b;
-      l = Pin->X - half;
-      b = Pin->Y - half;
-      r = l + half * 2;
-      t = b + half * 2;
-      gui->fill_rect (Output.pmGC, l, b, r, t);
-    }
-  else if (TEST_FLAG (OCTAGONFLAG, Pin))
-    {
-      DrawSpecialPolygon (gui, Output.pmGC, Pin->X, Pin->Y, half * 2, False);
-    }
-  else
-    {
-      gui->fill_circle (Output.pmGC, Pin->X, Pin->Y, half);
-    }
-  if ((!TEST_FLAG (PINFLAG, Pin) && !PCB->ViaOn)
-      || (TEST_FLAG (PINFLAG, Pin) && !PCB->PinOn))
-    return;
-  /* now draw the pin or via as appropriate */
-  switch (Type)
-    {
-    case VIA_TYPE:
-    case PIN_TYPE:
-      SetPVColor (Pin, Type);
-      DrawPinOrViaLowLevel (Pin, True);
-      break;
-    case NO_TYPE:
-    default:
-      break;
-    }
-}
-
 
 #if VERTICAL_TEXT
 /* vertical text handling provided by Martin Devera with fixes by harry eaton */
@@ -1727,9 +1679,6 @@ DrawVia (PinTypePtr Via, int unused)
 {
   if (!Gathering)
     SetPVColor (Via, VIA_TYPE);
-  //if (!doing_pinout && !TEST_FLAG (HOLEFLAG, Via) && TEST_ANY_PIPS (Via))
-  // ClearPin (Via, VIA_TYPE, 0);
-  //else
   DrawPinOrViaLowLevel (Via, True);
   if (!TEST_FLAG (HOLEFLAG, Via) && TEST_FLAG (DISPLAYNAMEFLAG, Via))
     DrawPinOrViaNameLowLevel (Via);
@@ -1770,9 +1719,6 @@ DrawViaName (PinTypePtr Via, int unused)
 void
 DrawPin (PinTypePtr Pin, int unused)
 {
-  //if (!doing_pinout && !TEST_FLAG (HOLEFLAG, Pin) && TEST_ANY_PIPS (Pin))
-  //  ClearPin (Pin, PIN_TYPE, 0);
-  //else
   {
     if (!Gathering)
       SetPVColor (Pin, PIN_TYPE);
@@ -1992,39 +1938,13 @@ DrawRegularText (LayerTypePtr Layer, TextTypePtr Text, int unused)
   DrawTextLowLevel (Text, min_silk_line);
 }
 
-static int
-cp_callback (const BoxType * b, void *cl)
-{
-  ClearPin ((PinTypePtr) b, (int) (size_t) cl, 0);
-  return 1;
-}
-
 /* ---------------------------------------------------------------------------
  * draws a polygon on a layer
  */
 void
 DrawPolygon (LayerTypePtr Layer, PolygonTypePtr Polygon, int unused)
 {
-  int layernum;
-
-  if (TEST_FLAG (SELECTEDFLAG | FOUNDFLAG, Polygon))
-    {
-      if (TEST_FLAG (SELECTEDFLAG, Polygon))
-	gui->set_color (Output.fgGC, Layer->SelectedColor);
-      else
-	gui->set_color (Output.fgGC, PCB->ConnectedColor);
-    }
-  else
-    gui->set_color (Output.fgGC, Layer->Color);
-  layernum = GetLayerNumber (PCB->Data, Layer);
   DrawPolygonLowLevel (Polygon);
-  if (TEST_FLAG (CLEARPOLYFLAG, Polygon))
-    {
-      r_search (PCB->Data->pin_tree, &Polygon->BoundingBox, NULL,
-		cp_callback, (void *) PIN_TYPE);
-      r_search (PCB->Data->via_tree, &Polygon->BoundingBox, NULL,
-		cp_callback, (void *) VIA_TYPE);
-    }
 }
 
 int
@@ -2365,12 +2285,6 @@ EraseElementPinsAndPads (ElementTypePtr Element)
   gui->set_color (Output.fgGC, Settings.BackgroundColor);
   PIN_LOOP (Element);
   {
-    /* if (TEST_ANY_PIPS (pin))
-       {
-       ClearPin (pin, NO_TYPE, 0);
-       gui->set_color (Output.fgGC, Settings.BackgroundColor);
-       }
-     */
     DrawPinOrViaLowLevel (pin, False);
     if (TEST_FLAG (DISPLAYNAMEFLAG, pin))
       DrawPinOrViaNameLowLevel (pin);




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