Anyone have a PLI routine which works with Icarus Verilog that can dump out a hierarchy of a design? I'm looking to get an output like:
I1.I3.I7 - mymodule I1.I4.I7 - mymodule I1.I3 - mybigmodule I1.I4 - mybigmodule
hmmm. That actually seems to get the job done. If you poke around there, v2html is based on rvp (rough verilog parser) which seems to work enough for the problem I wanted to solve. rvp is a perl module.
Thanks. -Dan
you can do this with Verilog-Perl even more easily than with v2html I think. john