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Dan McMahill wrote:
Anyone have a PLI routine which works with Icarus Verilog that can dump out a hierarchy of a design? I'm looking to get an output like:
I1.I3.I7 - mymodule I1.I4.I7 - mymodule I1.I3 - mybigmodule I1.I4 - mybigmodule
Shouldn't be too painful to write. Someone with basic VPI skills should be able to knock it off in a few hours.
Thanks -Dan