Re: gEDA-user: displaying nets on a component in PCB

[DJ Delorie <dj@xxxxxxxxxxx>]

> Sorry, I didn't notice the log message I get after entering the second
> netlist command:
> 
> Net .* has no pin U6-.*

Try this patch.  With it, you have three rats options:

:netlist rats
	 Adds all rats to the list (default)

:netlist norats
:netlist rats .* U31
	 Adds rats for nets which connect to U31

:addrats selectedrats
	 Adds rats which connect between (not just to) selected pins

That's in addition to rats-by-regex:

:netlist norats
:netlist rats ^A[0-7]$

Index: netlist.c
===================================================================
RCS file: /cvsroot/pcb/pcb/src/netlist.c,v
retrieving revision 1.20
diff -p -U2 -r1.20 netlist.c
--- netlist.c   2 Aug 2006 15:55:18 -0000       1.20
+++ netlist.c   24 Aug 2006 02:24:37 -0000
@@ -127,5 +127,6 @@ static void
 netlist_rats (LibraryMenuType * net, LibraryEntryType * pin)
 {
-  net->Name[0] = '*';
+  net->Name[0] = ' ';
+  net->flag = 1;
   hid_action ("NetlistChanged");
 }
@@ -134,5 +135,6 @@ static void
 netlist_norats (LibraryMenuType * net, LibraryEntryType * pin)
 {
-  net->Name[0] = ' ';
+  net->Name[0] = '*';
+  net->flag = 0;
   hid_action ("NetlistChanged");
 }



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