[Author Prev][Author Next][Thread Prev][Thread Next][Author Index][Thread Index]

gEDA-user: SDRAM questions

Hi All,

I am using a 32-bit 200MHz uP and would appreciate some feedback regarding SDRAM.
If I were to design for 32MB (say), then:

1. Is there a significant performance improvement for 16-bit (using one 256 Mb x16 chip) vs 32-bit (using 2 chips 128Mb x16)? I understand a single chip uses less space and easier to route.

2. For the 2 chip setup, is there a recommended routing topology for routing critical signals (clock, etc)? As per: http://focus.ti.com/lit/an/szza009/szza009.pdf
a "star" or "T" topology recommended, but there are others who recommend against it.

3. For a 4-layer board, I could place both the SDRAM chip(s) on the component side, or both on the solder side under the uP, or one on component and the other on solder side. Which is recommended? for simplicity? for cost of the board?

Thanks.



_______________________________________________
geda-user mailing list
geda-user@xxxxxxxxxxxxxx
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user