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gEDA-user: [PCB] Define regions where DRC is prohibited?



Hi,
  I have a board that I am going to place a company logo on the copper
layer. The DRC keeps complaining about the logo. Could I define a
region that DRC won't check? I covered the logo with a copper
rectanglar but DRC still complains.

  btw, if I draw two rectanglar side by side, DRC complains about
possible broken connection. Could the DRC rule be changed a little bit
so that when two rectanglars are side by side, the overlapping is not
required for the two to be electrically connected?

vax, 9000