gEDA-user: visualizing asynchronicity

[DJ Delorie <dj@xxxxxxxxxxx>]

Ok, so I'm sitting here at my desk doing my usual desk job, while my
gumstix and r8c boards are chatting away at full speed over an i2c bus
(I'm testing some software for the furnace controller).  My laptop is
watching the whole thing via the logic analyzer (it's been running
since yesterday) and I noticed something that made me think a bit.

The analyzer is triggering on the i2c start condition (sda drops while
scl is high).  The traces driven by the gumstix (i2c and a trace GPIO)
are mostly rock solid, even up to four cycles.  The occasional
pixel-wide jitter is all I see, mostly.  Occasionally, there's a gap
in the protocol between bytes, which I realize is caused by interrupts
on the gumstix.

The r8c is dumping status to a GPIO port.  *Those* traces are very
jittery, up to 1ms variance.  But, they all jitter in sync with each
other!  It occurred to me that the position of the r8c status changes
depends on where in the loop it was when the i2c state change
happened, so it was "random" where the r8c state change would show up,
within a one-loop time frame.

That's when I realized that I was "seeing" asynchronicity.  Neat.


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