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Re: gEDA-user: Design with a 144 pin QFP
Simon -
On Sun, Feb 03, 2008 at 01:26:40PM +0000, ST de Feber wrote:
> The device in mind is an Altera Cyclone-3 FPGA.
> Most probably the ep3c5.
FPGAs are the easiest chips to lay out, as long as you keep
an open mind about pin assignments until you're halfway
through the layout. Unless there is some other complex
part of the board, four layers is probably enough.
One for power, one for ground, and the top layer has
most of the routing away from the FPGA to its peripherals.
That leaves one layer for anything that doesn't quite
fit on the other three.
Stare at a PCI Ethernet or SCSI card for inspiration on
how routing is "supposed" to look. I use graphics cards
as a model for boards with higher pin-count FPGAs.
> As for the function, it will do audio-dsp like
> functions. I2S in, 3 to 4 channel FIR filtering
> (1024-tap) and I2S out. When not filled completely i
> will try to add a simple uc.
I suggest reading Jan Gray's essays (now all historical)
on uc design in FPGAs: fpgacpu.org. He's a Xilinx partisan,
but many of the concepts still apply to Altera.
- Larry
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